Datasheet

PmodAD5™ Reference Manual
Copyright Digilent, Inc. All rights reserved.
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Page 3 of 4
2.1 Pinout Description Table
Table 3. Pmod header J1.
Table 4. Pmod header J2 (note that pin 1 is on the lower-right hand corner of the header).
Any incoming input voltage to be measured must be within ±(AV
DD
-1.25V)/gain. As AV
DD
must be within 3V and
5.25V, if a 5V power supply is used, the largest possible range of incoming input voltage is -3.75V to 3.75V. By
default, the jumper on JP1 is loaded such that the AVDD voltage matches the DVDD voltage. If users want to apply
a higher AVDD voltage to header J4 so that they are able to utilize larger reference voltages, the jumper block from
JP1 must be removed so that the two voltage sources are disconnected.
Any external power applied to the PmodAD5 must be within 3V and 5.25V; however, it is recommended that Pmod
is operated at 3.3V.
Pin
Signal
Description
1
CS
Chip Select
2
MOSI
Master-Out-Slave-In
3
MISO
Master-In-Slave-Out
4
SCK
Serial Clock
5
GND
Power Supply Ground
6
VCC
Power Supply (3.3V/5V)
Pin
Signal
Description
1
A1
Analog Input 7
2
A2
Analog Input 8
3
A3
Analog Input 3
4
A4
Analog Input 4
5
A5
Analog Input 5
6
A6
Analog Input 6
7
A7
Analog Input 7
8
A8
Analog Input 8
9
AINCOM
Common Analog Input
10
REFIN2+
Reference Input 2 +
11
REFIN2-
Reference Input 2 -
12
BPDSW
Bridge Power-down Switch