Datasheet

JTAG-HS2™ Programming Cable for Xilinx FPGAs
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
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1 Software Support
In addition to working seamlessly with all Xilinx tools, Digilent's Adept software and the Adept software
development kit (SDK) support the HS2 cable. For added convenience, customers may freely downloaded the SDK
from Digilent's website. This Adept software includes a full-featured programming environment and a set of public
application programming interfaces (API) that allow user applications to directly drive the JTAG chain.
With the Adept SDK, users can create custom applications that will drive JTAG ports on virtually any device. Users
may utilize the APIs provided by the SDK to create applications that can drive any SPI device supporting those
modes. Please see the Adept SDK reference manual for more information.
Digilent's AVR programmer also supports the HS2 and the cable can be used to program any AVR device.
2 IEEE 1149.7-2009 Compatibility
The JTAG-HS2 supports several scan formats including; the JScan0-JScan3, MScan, and OScan0 - OScan7. It is
capable of communicating in 4-wire and 2-wire scan chains that consist of Class T0 – T4 JTAG Target Systems (TS).
(See Figs. 4 & 5).
TMS
TDI
TCK
TDO
Host
+
JTAG-HS2
(DTS)
TMS
TDI
TCK
TDO
Target
System 0
TMS
TDI
TCK
TDO
Target
System 1
TMS
TDI
TCK
TDO
Target
System N
TMSC
TDIC
TCKC
TDOC
Target
System 0
Target
System 1
Target
System N
TMSC
TDIC
TCKC
TDOC
TMSC
TDIC
TCKC
TDOC
TMS
TDI
TCK
TDO
Host
+
JTAG-HS2
(DTS)
TMSC
TDIC
TCKC
TDOC
Target
System 0
Target
System 1
Target
System N
TMSC
TDIC
TCKC
TDOC
TMSC
TDIC
TCKC
TDOC
TMS
TDI
TCK
TDO
Host
+
JTAG-HS2
(DTS)
Figure 5. 4-Wire star topology (left), 2-Wire star topology (right).
Figure 4. 4-wire series topology.