Datasheet

Data Sheet SSM2518
Rev. A | Page 41 of 48
Bits Bit Name Settings Description Reset Access
1100 −87 dB
1101 −90 dB
1110 −93 dB
1111 −96 dB
DRC CONTROL 5 REGISTER
Address: 0x0E, Reset: 0x8C, Name: DRC_Control_5
Table 27. Bit Descriptions for DRC_Control_5
Bits Bit Name Settings Description Reset Access
[7:4] DRC_SMAX DRC Limiter Threshold Setting. Relative to input. 0x8 RW
0000 0 dB
0001 −1 dB
0010 −2 dB
0011 −3 dB
0100 −4 dB
0101 −5 dB
0110 −6 dB
0111 −7 dB
1000 −8 dB
1001 −10 dB
1010 −12 dB
1011 −14 dB
1100 −16 dB
1101 −18 dB
1110 −20 dB
1111 −22 dB