Datasheet

2009-2016 Microchip Technology Inc. DS60001156J-page 189
PIC32MX5XX/6XX/7XX
18.0 SERIAL PERIPHERAL
INTERFACE (SPI)
The SPI module is a synchronous serial interface that
is useful for communicating with external peripherals
and other microcontroller devices. These peripheral
devices may be Serial EEPROMs, Shift registers, dis-
play drivers, Analog-to-Digital Converters, etc. The
PIC32 SPI module is compatible with Motorola
®
SPI
and SIOP interfaces.
The following are some of the key features of the SPI
module:
Master mode and Slave mode support
Four different clock formats
Enhanced Framed SPI protocol support
User-configurable 8-bit, 16-bit and 32-bit data
width
Separate SPI FIFO buffers for receive and transmit
- FIFO buffers act as 4/8/16-level deep FIFOs
based on 32/16/8-bit data width
Programmable interrupt event on every 8-bit,
16-bit and 32-bit data transfer
Operation during Sleep and Idle modes
Fast bit manipulation using CLR, SET and INV
registers
FIGURE 18-1: SPI MODULE BLOCK DIAGRAM
Note: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to Section 23. “Serial Peripheral
Interface (SPI)” (DS60001106) in the
“PIC32 Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com/PIC32).
Internal
Data Bus
SDIx
SDOx
SSx
/F
SYNC
SCKx
SPIxSR
bit 0
Shift
Control
Edge
Select
Enable Master Clock
Baud Rate
Slave Select
Sync Control
Clock
Control
Transmit
Receive
and Frame
Note: Access SPIxTXB and SPIxRXB FIFOs via SPIxBUF register.
FIFOs Share Address SPIxBUF
SPIxBUF
Generator
PBCLK
WriteRead
SPIxTXB FIFO
SPIxRXB FIFO