Datasheet

1V
A
6 CS
2GND 5 SDATA
3V
IN
4 SCLK
1V
A
6 CS
2GND 5 SDATA
3V
IN
4 SCLK
3
ADC081S021
www.ti.com SNAS308G –APRIL 2005–REVISED MAY 2016
Product Folder Links: ADC081S021
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(1) All devices are fully pin and function compatible.
5 Device Comparison Table
RESOLUTION
SPECIFIED SAMPLE RATE RANGE
(1)
50 TO 200 KSPS 200 TO 500 KSPS 500 KSPS TO 1 MSPS
12 Bits ADC081S021121S021 ADC081S021121S051 ADC081S021121S101
10 Bits ADC081S021101S021 ADC081S021101S051 ADC081S021101S101
8 Bits ADC081S021 ADC081S021081S051 ADC081S021081S101
6 Pin Configuration and Functions
DBV Package
6-Pin SOT-23
Top View
NGF Package
6-Pin WSON
Top View
(1) G = Ground, I = Input, O = Output, P = Power
Pin Functions
PIN
TYPE
(1)
DESCRIPTION
NO. NAME
1 V
A
P
Positive supply pin. This pin must be connected to a quiet 2.7-V to 5.25-V source and bypassed to GND
with a 1-µF capacitor and a 0.1-µF monolithic capacitor placed within 1 cm of the power pin.
2 GND G The ground return for the supply and signals.
3 V
IN
I Analog input. This signal can range from 0 V to V
A
.
4 SCLK I Digital clock input. This clock directly controls the conversion and readout processes.
5 SDATA O Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin.
6 CS I Chip select. On the falling edge of CS, a conversion process begins.