Datasheet
Genesys 2 FPGA Board Reference Manual
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Page 4 of 31
All Genesys 2 power supplies can be turned on and off together by a single logic-level power switch (SW8). Power
supplies are either enabled/disabled directly by the power switch or indirectly by other supplies upstream. A
power-good LED (LD15), driven by the “power good” output of the on-board regulators, indicates that the supplies
are turned on and operating normally. An overview of the Genesys 2 power circuit is shown in Figure 1.
12V Power Jack
(J27)
Power Switch
(SW8)
VCC1V0 (14A)
LTC3866
VCC1V8 (5A)
LTC3605
VCC3V3 (6A)
LTC3855#1
VCC5V0 (3A)
LTC3855#2
VADJ (5A)
LTM4618
VSWT12V0 (1A)
MGTAVTT1V2 (1.5A)
LTC3026
MGTAVCC1V0 (2A)
LT3083
VCCAUXIO2V0 ( 150mA)
LT1762
VCC1V5 (2A)
LTC3618#1
VTT0V75 (2A)
LTC3618#2
MGTAVCCAUX1V8 (100mA)
LT1762
VCCADC (100mA)
LT1761
VREFP1V25 (25mA)
LT1790
VCCAVDD3V3 (100mA)
LT1761
VREF0V75 (10mA)
LT3618#3
Figure 1. Genesys 2 power circuit
An external power supply can be used by plugging it into the power jack (J27). The supply must use a coax, center-
positive 2.1mm internal-diameter plug, and deliver 12VDC ±5 %. The minimum current rating of the supply
depends on the actual design implemented in the FPGA, but at least 3A (i.e., at least 36W) is recommended. For
high-power FMC applications, a 60W supply is recommended.
Voltage regulator circuits from Linear Technology create the different voltages required by the FPGA and on-board
peripherals from the main power input. Some regulators use the outputs of another regulator as input, depending
on design considerations. In some cases, this chaining helps in creating the proper power-on sequence for circuits.
In other cases, the chaining of power supply enables achieves the same purpose.
Table 2 provides information on maximum and typical currents for each power rail. The typical currents strongly
depend on FPGA configuration and the values provided are the current consumption of the OOB demo.