Datasheet

• Connecting the board to an Ethernet network will acquire link, IP address and become “pingable” at the IPv4
address displayed on the OLED.
• Connecting the USB-UART port to a PC and opening a terminal (115200, 8, N, 1) shows status messages.
• Pushing BTNU records audio off the microphone input for five seconds and plays it back on the headphone
output if BTND is pushed, or line-out if BTNL. Similarly, BTNR starts a recording off the line-in jack.
• The LEDs are showing a scanning light bar.
• The fan starts when FPGA internal temperature reaches 60°C and stops when it drops back to 40°C.
To develop new FPGA designs for the Genesys 2, download and install the
Xilinx Vivado® Design Suite
[http://www.xilinx.com/products/design-tools/vivado.html]. The tools include all the USB drivers for the board. Once
installed, the USB JTAG and USB UART ports can be connected to the PC and making the FPGA visible in Vivado
Hardware Manager.
Additional resources can be found on the Genesys 2 Resource Center.
2. Power Supplies
The Genesys 2 board can receive power from an external power supply through the center-positive barrel jack (J27). The
external supply voltage must be 12 V ±5 %. The Genesys 2 cannot be powered from the USB bus.
All Genesys 2 power supplies can be turned on and off together by a single logic-level power switch (SW8). Power
supplies are either enabled/disabled directly by the power switch or indirectly by other supplies upstream. A power-good
LED (LD15), driven by the “power good” output of the on-board regulators, indicates that the supplies are turned on
and operating normally. An overview of the Genesys 2 power circuit is shown in Figure 1.