Datasheet

1
2
3
6
5
4
V
CC1
V
CC1
V
CC2
SYSTEM-1 SYSTEM-2
DIR CTRL
I/O-1
V
CC2
I/O-2
Pullup/Down
or Bus Hold
(1)
Pullup/Down
or Bus Hold
(1)
SN74LVC1T45
SCES515K –DECEMBER 2003 –REVISED DECEMBER 2014 www.ti.com
10.2.1.3 Application Curve
Figure 12. Translation Up (1.8 V to 5 V) at 2.5 MHz
10.2.2 Bidirectional Logic Level-Shifting Application
Figure 13 shows the SN74LVC1T45 being used in a bidirectional logic level-shifting application. Since the
SN74LVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid
bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.
Figure 13. Bidirectional Logic Level-Shifting Application
10.2.2.1 Design Requirements
Please refer to Design Requirements.
10.2.2.2 Detailed Design Procedure
Table 3 shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1.
Table 3. SYSTEM-1 and SYSTEM-2 Data Transmission
STATE DIR CTRL I/O-1 I/O-2 DESCRIPTION
1 H Out In SYSTEM-1 data to SYSTEM-2
SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The bus-
2 H Hi-Z Hi-Z
line state depends on pullup or pulldown.
(1)
DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or
3 L Hi-Z Hi-Z
pulldown.
(1)
4 L Out In SYSTEM-2 data to SYSTEM-1
(1) SYSTEM-1 and SYSTEM-2 must use the same conditions, i.e., both pullup or both pulldown.
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