User manual

9.2. Multi-purpose Digital I/O
 16 digital I/Os arranged in two Pmod-style (2×6) connectors.
 Each of the 16 pins can be configured for input (Logic analyzer) or set as output
6)
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 Algorithmic pattern generator (no buffers used)
7)
 Custom pattern buffer/ch.: 32Ksamples
 ROM Logic for implementing user defined Boolean functions and State Machines
 Bus Protocol Controllers (SPI, UART, I²C)
 100MSps max. output sample rate (50MHz maximum output frequency).
 Automatic or manual strength and slew settings for outputs.
8)
 User programmable logic I/O levels from 1.2V to 3.3V (5V compatible)
9)
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10)
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9.3. Other features
 USB bus powered
 User power supplies, 1.2V to 3.3V, available in the two Pmod-style connectors (100mA
max)
 Twisted wire high-speed cable option for input channels to insure signal integrity
 Free Waveforms 2015 software runs on Windows, MacOS, and Linux
 Cross-triggering between Logic Analyzer, Pattern Generator or external trigger
 Data file import/export using standard formats
 80X80X25mm, 80g (without accessories)
 includes: USB cable, fly-wire accessory
Written by Mircea Dabacan, PhD, Technical University of Cluj-Napoca Romania
1)
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6)
The 16 DIO lines are primarily intended for the Pattern Generator, protocol controllers and Static
IO instruments. For user convenience, some or all of them can be used by the Logic Analyzer
also (see footnote 2). However, DIO input circuitry is different compared to DIN. Even more,
when driving a DIO pin with the Pattern Generator and reading it back with the Logic Analyzer,
the signal is read at the FPGA pin and does not propagate trough the external DIO circuitry.
Consequently, when combining DIN and DIO pins in the Logic Analyzer, misalignments can be
observed, at high acquisition rate.
2)
Available combinations in WaveForms:
1. 200MHz, DIN0…23, DIO24…31
2. 200MHz, DIO24…39, DIN0…15
3. 400MHz, DIN0…15
4. 400MHz, DIO24…39
5. 800MHz, DIN0…7
6. 800MHz, DIO24…31