User manual

The VBUS voltage is halved to VSNS_VBUS, for being also monitored. IC12 in Figure 11 is a
triple power supply, generating the rails of 1.2V for the FPGA core, 1.5V for Bank 3 and DDR3
memory and 3.3V, for various circuits.
Figure 11 VBUS monitoring.
Figure 12. Internal voltage supplies.
4.2 Programmable power supply
IC13 in Figure 13 generates the VCCIO_PROG, the variable voltage to supply the input and IO
banks of the FPGA:
V VCCIO_PROG =V FB ∙(1+R 144 R 146 +R 144 R 149 )−V VSET_VCCIO ∙R 144 R 146 =3.42V−V VSET_VCCIO ∙0.82(3)
With VVSET_VCCIO ϵ (0…3V), VCCIO_PROG could be theoretically set in the range:
VCCIO_PROG ϵ (1.02V…3.42V). IC15 is a current shunt amplifier, with a gain of 100. With
Vref = 0.75V and R115 = 50mΩ, the output voltage is:
V
ISNS_USR =100∙(V IN+ −V IN− )+0.75V=5∙I VCCIO_USR +0.75V(4)