User manual

IC14 is a window comparator: FAULT_USR is logical LOW, when VISNS_USR is either more
than 1.5V (IVCCIO_USR>150mA) or less than 0.66V (IVCCIO_USR←18mA). If this happens,
the FPGA turns EN_PWR_USR to LOW, which turns both Q1A and Q1B OFF, to protect
VCCIO_USR against overcurrent and reverse current respectively. VCCIO_USR is halved to
VSNS_USR, for being monitored.
Figure 13. VCCIO_PROG supply.
Figure 14. VCCIO_USR protection and switch.
4.3. Monitoring the power supplies
The microcontroller in Figure 15 has two roles:
1. A/D Conversion of VVSNS_VBUS, VISNS_VBUS, VVSNS_USR, VISNS_USR,
representing the voltages and currents consumed from VBUS and VCCIO_USR
respectively. The digital results are passed to the FPGA via an SPI interface.
2. Storing the calibration parameters computed as a part of the manufacturing test. During
regular behavior, the WaveForms Software reads the parameters and corrects both
generated and acquired signals.
The DAC in Figure 16 generates the setting voltage for programming the value of VCCIO. IC22
in Figure 17 provides 3V reference voltage for both ADC and DAC above.