Datasheet

Block Protection Areas

Table 5: Protected Area Sizes – Upper Area

Note 1 applies to the entire table

Status Register Content Memory Content

Top/

Bottom

Bit BP3 BP2 BP1 BP0 Protected Area Unprotected Area

0 0 0 0 0 None All sectors

0 0 0 0 1 Sector 511 Sectors (0 to 510)

0 0 0 1 0 Sectors (510 to 511) Sectors (0 to 509)

0 0 0 1 1 Sectors (508 to 511) Sectors (0 to 507)

0 0 1 0 0 Sectors (504 to 511) Sectors (0 to 503)

0 0 1 0 1 Sectors (496 to 511) Sectors (0 to 495)

0 0 1 1 0 Sectors (480 to 511) Sectors (0 to 479)

0 0 1 1 1 Sectors (448 to 511) Sectors (0 to 447)

0 1 0 0 0 Sectors (384 to 511) Sectors (0 to 383)

0 1 0 0 1 Sectors (256 to 511) Sectors (0 to 255)

0 1 0 1 0 All sectors None

0 1 0 1 1 All sectors None

0 1 1 0 0 All sectors None

0 1 1 0 1 All sectors None

0 1 1 1 0 All sectors None

0 1 1 1 1 All sectors None

Note:

1. See the Status Register for details on the top/bottom bit and the BP 3:0 bits.

Table 6: Protected Area Sizes – Lower Area

Note 1 applies to the entire table

Status Register Content Memory Content

Top/

Bottom

Bit BP3 BP2 BP1 BP0 Protected Area Unprotected Area

1 0 0 0 0 None All sectors

1 0 0 0 1 Sector 0 Sectors (1 to 511)

1 0 0 1 0 Sectors (0 to 1) Sectors (2 to 511)

1 0 0 1 1 Sectors (0 to 3) Sectors (4 to 511)

1 0 1 0 0 Sectors (0 to 7) Sectors (8 to 511)

1 0 1 0 1 Sectors (0 to 15) Sectors (16 to 511)

1 0 1 1 0 Sectors (0 to 31) Sectors (32 to 511)

1 0 1 1 1 Sectors (0 to 63) Sectors (64 to 511)

1 1 0 0 0 Sectors (0 to 127) Sectors (128 to 511)

3V, 256Mb: Multiple I/O Serial Flash Memory

Device Protection

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n25q_256mb_65nm.pdf - Rev. W 11/16 EN

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