Datasheet

4-Byte Address
To execute 4-byte READ MEMORY commands, S# is driven LOW. The command code is
input on DQn, followed by input on DQn of four address bytes. Each address bit is
latched in during the rising edge of the clock. The addressed byte can be at any location,
and the address automatically increments to the next address after each byte of data is
shifted out; therefore, the entire memory can be read with a single command. The oper-
ation is terminated by driving S# HIGH at any time during data output.
Table 26: Command/Address/Data Lines for READ MEMORY Commands – 4-Byte Address
Notes 1 and 2 apply to entire table
Command Name (4-Byte Address)
READ
FAST
READ
DUAL OUTPUT
FAST READ
DUAL
INPUT/OUTPUT
FAST READ
QUAD OUTPUT
FAST READ
QUAD
INPUT/OUTPUT
FAST READ
STR Mode 03h/13h 0Bh/0Ch 3Bh/3Ch BBh/BCh 6Bh/6Ch EBh/ECh
DTR Mode 0Dh 3Dh BDh 6Dh EDh
Extended SPI Protocol
Supported Yes Yes Yes Yes Yes Yes
Command Input DQ0 DQ0 DQ0 DQ0 DQ0 DQ0
Address Input DQ0 DQ0 DQ0 DQ[1:0] DQ0 DQ[3:0]
Data Output DQ1 DQ1 DQ[1:0] DQ[1:0] DQ[3:0] DQ[3:0]
Dual SPI Protocol
Supported No Yes Yes Yes No No
Command Input DQ[1:0] DQ[1:0] DQ[1:0]
Address Input DQ[1:0] DQ[1:0] DQ[1:0]
Data Output DQ[1:0] DQ[1:0] DQ[1:0]
Quad SPI Protocol
Supported No Yes No No Yes Yes
Command Input DQ[3:0] DQ[3:0] DQ[3:0]
Address Input DQ[3:0] DQ[3:0] DQ[3:0]
Data Output DQ[3:0] DQ[3:0] DQ[3:0]
Notes:
1. Yes in the "Supported" row for each protocol indicates that the command in that col-
umn is supported; when supported, a command's functionality is identical for the entire
column regardless of the protocol. For example, a FAST READ functions the same for all
three protocols even though its data is input/output differently depending on the pro-
tocol.
2. Command codes 13h, 0Ch, 3Ch, BCh, 6Ch, and ECh do not need to be set up in the ad-
dressing mode; they will work directly in 4-byte addressing mode.
3. A 4-BYTE FAST READ command is similar to 4-BYTE READ operation, but requires dum-
my clock cycles following the address bytes and can operate at a higher frequency (
f
C).
3V, 256Mb: Multiple I/O Serial Flash Memory
READ MEMORY Operations
09005aef84566603
n25q_256mb_65nm.pdf - Rev. W 11/16 EN
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