Datasheet

Figure 17: DUAL OUTPUT FAST READ Command – STR
7 8 C
x
0
C
MSB
DQ0
LSB
Command
D
OUT
LSB
DQ1
D
OUT
A[MAX]
High-Z
A[MIN]
D
OUT
MSB
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
Dummy cycles
DQ[1:0]
Dual
Extended
3 4 C
x
0
C
MSB
LSB
Command
A[MAX]
A[MIN]
MSB
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
LSB
Dummy cycles
Notes:
1. C
x
= 7 + (A[MAX] + 1).
2. Shown here is the DUAL OUTPUT FAST READ timing for the extended SPI protocol. The
dual timing shown for the FAST READ command is the equivalent of the DUAL OUTPUT
FAST READ timing for the dual SPI protocol.
Figure 18: DUAL INPUT/OUTPUT FAST READ Command – STR
7 8 C
x
0
C
MSB
DQ0
LSB
Command
D
OUT
LSB
DQ1
D
OUT
High-Z
A[MIN]
D
OUT
MSB
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
A[MAX]
Dummy cycles
3 4 C
x
0
C
MSB
DQ[1:0]
LSB
Command
A[MAX]
A[MIN]
MSB
D
OUT
D
OUT
D
OUT
D
OUT
D
OUT
LSB
Dummy cycles
Dual
Extended
Notes:
1. C
x
= 7 + (A[MAX] + 1)/2.
2. Shown here is the DUAL INPUT/OUTPUT FAST READ timing for the extended SPI proto-
col. The dual timing shown for the FAST READ command is the equivalent of the DUAL
INPUT/OUTPUT FAST READ timing for the dual SPI protocol.
3V, 256Mb: Multiple I/O Serial Flash Memory
READ MEMORY Operations
09005aef84566603
n25q_256mb_65nm.pdf - Rev. W 11/16 EN
47
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.