Datasheet

Pmod VGA Reference Manual
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Other product and company names mentioned may be trademarks of their respective owners.
Page 5 of 5
A VGA controller circuit, such as the one diagrammed in Fig. 4, decodes the output of a horizontal-sync counter
driven by the pixel clock to generate HS signal timings. You can use this counter to locate any pixel location on a
given row. Likewise, the output of a vertical-sync counter that increments with each HS pulse can be used to
generate VS signal timings, and you can use this counter to locate any given row. These two continually running
counters can be used to form an address into video RAM. No time relationship between the onset of the HS pulse
and the onset of the VS pulse is specified, so you can arrange the counters to easily form video RAM addresses, or
to minimize decoding logic for sync pulse generation.
3 Additional Information
The schematics of the Pmod VGA are available here. Additional information about the transceiver used including
voltage levels and specific timings of the chip can be found by checking out its datasheet here.
Example code demonstrating how to get information from the Pmod VGA can be found on its Resource
Center here.
If you have any questions or comments about the Pmod VGA, feel free to post them under the appropriate section
(“Add-on Boards”) of the Digilent Forum.