Datasheet

Zynq-7000 All Programmable SoC (Z-7007S, Z-7012S, Z-7014S, Z-7010, Z-7015, and Z-7020)
DS187 (v1.19) October 3, 2016 www.xilinx.com
Product Specification 15
To select the -1LI (PL 0.95V) speed specifications in the Vivado tools, select the Zynq-7000 sub-family and then select the
part name that is the device name followed by an i followed by the package name followed by the speed grade. For example,
select the xc7z020iclg484-1L part name for the XC7Z020 device in the CLG484 package and -1LI (PL 0.95V) speed grade.
The -1LI (PL 0.95V) speed specifications are not supported in the ISE tools.
A similar part naming convention applies to the speed specifications selection in the ISE tools for supported devices. See
Table 16 for the subset of the Zynq-7000 devices supported in the ISE tools.
PS Performance Characteristics
For further design requirement details, refer to the Zynq-7000 All Programmable SoC Technical Reference Manual (UG585).
Table 17: CPU Clock Domains Performance
Symbol Clock Ratio Description
Speed Grade
Units
-3 -2 -1C/-1I/-1LI -1Q
F
CPU_6X4X_621_MAX
(1)
6:2:1
Maximum CPU clock frequency 866 766 667 667 MHz
F
CPU_3X2X_621_MAX
Maximum CPU_3X clock frequency 433 383 333 333 MHz
F
CPU_2X_621_MAX
Maximum CPU_2X clock frequency 288 255 222 222 MHz
F
CPU_1X_621_MAX
Maximum CPU_1X clock frequency 144 127 111 111 MHz
F
CPU_6X4X_421_MAX
(1)
4:2:1
Maximum CPU clock frequency 710 600 533 533 MHz
F
CPU_3X2X_421_MAX
Maximum CPU_3X clock frequency 355 300 267 267 MHz
F
CPU_2X_421_MAX
Maximum CPU_2X clock frequency 355 300 267 267 MHz
F
CPU_1X_421_MAX
Maximum CPU_1X clock frequency 178 150 133 133 MHz
Notes:
1. The maximum frequency during BootROM execution is 500 MHz across all speed specifications.
Table 18: PS DDR Clock Domains Performance
(1)
Symbol Description
Speed Grade
Units
-3 -2 -1C/-1I/-1LI -1Q
F
DDR3_MAX
Maximum DDR3 interface performance 1066 1066 1066 1066 Mb/s
F
DDR3L_MAX
Maximum DDR3L interface performance 1066 1066 1066 1066 Mb/s
F
DDR2_MAX
Maximum DDR2 interface performance 800 800 800 800 Mb/s
F
LPDDR2_MAX
Maximum LPDDR2 interface performance 800 800 800 800 Mb/s
F
DDRCLK_2XMAX
Maximum DDR_2X clock frequency 444 408 355 355 MHz
Notes:
1. All performance numbers apply to both internal and external V
REF
configurations.
Table 19: PS-PL Interface Performance
Symbol Description Min Max Units
F
EMIOGEMCLK
EMIO gigabit Ethernet controller maximum frequency – 125 MHz
F
EMIOSDCLK
EMIO SD controller maximum frequency – 25 MHz
F
EMIOSPICLK
EMIO SPI controller maximum frequency – 25 MHz
F
EMIOJTAGCLK
EMIO JTAG controller maximum frequency – 20 MHz
F
EMIOTRACECLK
EMIO trace controller maximum frequency – 125 MHz
F
FTMCLK
Fabric trace monitor maximum frequency – 125 MHz
F
EMIODMACLK
DMA maximum frequency – 100 MHz
F
AXI_MAX
Maximum AXI interface performance – 250 MHz