Datasheet

Zynq-7000 All Programmable SoC (Z-7007S, Z-7012S, Z-7014S, Z-7010, Z-7015, and Z-7020)
DS187 (v1.19) October 3, 2016 www.xilinx.com
Product Specification 3
V
PIN
(4)
PS DDR and MIO I/O input voltage –0.20 –
V
CCO_DDR
+0.20
V
CCO_MIO
+0.20
V
PL
V
CCINT
(5)
PL internal supply voltage 0.95 1.00 1.05 V
PL -1LI (0.95V) internal supply voltage 0.92 0.95 0.98 V
V
CCAUX
PL auxiliary supply voltage 1.71 1.80 1.89 V
V
CCBRAM
(5)
PL block RAM supply voltage 0.95 1.00 1.05 V
PL -1LI (0.95V) block RAM supply voltage 0.92 0.95 0.98 V
V
CCO
(6)(7)
PL supply voltage for HR I/O banks 1.14 – 3.465 V
V
IN
(4)
I/O input voltage –0.20 – V
CCO
+0.20 V
I/O input voltage (when V
CCO
= 3.3V) for V
REF
and differential I/O
standards except TMDS_33
(8)
–0.20 – 2.625 V
I
IN
(9)
Maximum current through any (PS or PL) pin in a powered or unpowered
bank when forward biasing the clamp diode
–– 10 mA
V
CCBATT
(10)
Battery voltage 1.0 – 1.89 V
GTP Transceiver (XC7Z015 Only)
V
MGTAVCC
(11)
Analog supply voltage for the GTP transmitter and receiver circuits 0.97 1.0 1.03 V
V
MGTAVTT
(11)
Analog supply voltage for the GTP transmitter and receiver termination
circuits
1.17 1.2 1.23 V
XADC
V
CCADC
XADC supply relative to GNDADC 1.71 1.80 1.89 V
V
REFP
Externally supplied reference voltage 1.20 1.25 1.30 V
Temperature
T
j
Junction temperature operating range for commercial (C) temperature
devices
0– 85 °C
Junction temperature operating range for extended (E) temperature
devices
0 – 100 °C
Junction temperature operating range for industrial (I) temperature
devices
–40 – 100 °C
Junction temperature operating range for expanded (Q) temperature
devices
–40 – 125 °C
Notes:
1. All voltages are relative to ground. The PL and PS share a common ground.
2. For the design of the power distribution system consult the Zynq-7000 All Programmable SoC PCB Design Guide (UG933
).
3. Applies to both MIO supply banks V
CCO_MIO0
and V
CCO_MIO1
.
4. The lower absolute voltage specification always applies.
5. V
CCINT
and V
CCBRAM
should be connected to the same supply.
6. Configuration data is retained even if V
CCO
drops to 0V.
7. Includes V
CCO
of 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V at ±5%.
8. See Table 11 for TMDS_33 specifications.
9. A total of 200 mA per PS or PL bank should not be exceeded.
10. V
CCBATT
is required only when using bitstream encryption. If battery is not used, connect V
CCBATT
to either ground or V
CCAUX
.
11. Each voltage listed requires the filter circuit described in the 7 Series FPGAs GTP Transceiver User Guide (UG482
).
Table 2: Recommended Operating Conditions
(1)(2)
(Cont’d)
Symbol Description Min Typ Max Units