Datasheet

Zynq-7000 All Programmable SoC (Z-7007S, Z-7012S, Z-7014S, Z-7010, Z-7015, and Z-7020)
DS187 (v1.19) October 3, 2016 www.xilinx.com
Product Specification 70
eFUSE Programming Conditions
Table 102 lists the programming conditions specifically for eFUSE. For more information, see the 7 Series FPGA Configuration
User Guide (UG470
).
Revision History
The following table shows the revision history for this document:
Table 102: eFUSE Programming Conditions
(1)
Symbol Description Min Typ Max Units
I
PLFS
PL V
CCAUX
supply current – – 115 mA
I
PSFS
PS V
CCPAUX
supply current – – 115 mA
t
j
Temperature range 15 – 125 °C
Notes:
1. The Zynq-7000 device must not be configured during eFUSE programming.
Date Version Description of Revisions
05/07/2012 1.0 Initial Xilinx release.
06/27/2012 1.1 Updated the descriptions, changed V
IN
, Note 3, Note 4, and added V
PREF
, V
PIN
, and Note 5 in
Table 1. In Table 2, updated descriptions and notes. Updated Table 3 and added R
IN_TERM
. Removed
I
CCMIOQ
from Table 5. Removed I
CCMIOQ
and updated XC7Z020 in Table 6. Updated LVCMOS12,
SSTL135, and SSTL15 in Table 10. Updated Table 18.
In PS Performance Characteristics section, added timing diagrams and revised many tables.
Updated Table 50 and removed notes 2 and 3. Added Note 2 and Note 3 to Table 51. Changed
Table 53 by adding T
IOIBUFDISABLE
. Removed many of the combinatorial delay specifications and
T
CINCK
/T
CKCIN
from Table 62.
In Table 100 updated Offset Error and Matching descriptions and Gain Error and Matching
descriptions, and added Note 2 to Integral Nonlinearity.
09/12/2012 1.2 Changed Note 3 and added Note 5 in Table 1. Updated T
j
in Table 2, also revised Note 4 and Note 9.
Updated specifications including R
IN_TERM
in Table 3. Added Table 4. Updated the XC7Z020
specifications in Table 6. Updated standards in Table 8. Updated specifications in Table 12.
Updated the AC Switching Characteristics section for the ISE tools 14.2 speed specifications
throughout the document.
In PS Performance Characteristics section introduction, revised tables, updated Figure 4, and added
Figure 5. Updated parameters in Figure 6 through Figure 13. Updated values in Table 17. Added
Note 2 to Table 23. Added Note 3 to Table 36. Updated descriptions and revised F
MSPICLK
in Table 41.
Updated Note 3 in Table 51. Changed F
PFDMAX
conditions in Table 72 and Table 73. Updated devices
and added values to Table 84.
02/11/2013 1.3 Updated the AC Switching Characteristics based upon ISE tools 14.4 and Vivado tools 2012.4, both at
v1.05 for the -3, -2, and -1 speed specifications throughout the document. Updated Table 15 and
Table 16 to the product status of production for the XC7Z020 devices with -2 and -1 speed
specifications.
Updated description in Introduction. Revised V
PIN
in Table 1. Revised V
PIN
and I
IN
and added Note 2
to Table 2. Clarified PS specifications, added C
PIN
, and removed Note 3 on I
RPD
in Table 3. Added
values to Table 5. Updated Power Supply Requirements section. Revised descriptions in Table 7.
Revised Note 1, removed LVTTL, notes 2 and 3, and added SSTL135 to Table 8. Added Table 9.
Removed HSTL_I_12 and SSTL_12 from Table 10. Removed DIFF_SSTL12 from Table 12. Revise in
V
CCO
min/max in Table 13.
Many changes to the PS Switching Characteristics section including adding tables, figures, notes with
test conditions where applicable. In Table 17, updated the 6:2:1 clock ratio frequencies. Updated
minimum value for T
ULPIDCK
in Table 35. Added a 2:1 memory controller section to Table 51.
Updated Note 1 in Table 69. Updated Note 1 and Note 2 in Table 84.Updated the rows on offset error
and matching and gain error and matching and the maximum external channel input ranges in
Table 100. Added Internal Configuration Access Port section to Table 101.