Datasheet

SCL
SDA
t
LOW
t
HIGH
START
REPEATED
START
STOP
START
t
SP
HDC1080
SNAS672A –NOVEMBER 2015–REVISED JANUARY 2016 www.ti.com
7.6 I2C Interface Electrical Characteristics
At T
A
=30°C, V
DD
=3V (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
I2C INTERFACE VOLTAGE LEVEL
VIH Input High Voltage 0.7xV
DD
V
VIL Input Low Voltage 0.3xV
DD
V
VOL Output Low Voltage Sink current 3mA 0.4 V
HYS Hysteresis
(1)
0.1xV
DD
V
CIN Input Capacitance on all digital pins 0.5 pF
(1) This parameter is specified by design and/or characterization and it is not tested in production.
7.7 I2C Interface Timing Requirements
PARAMETER TEST CONDITION MIN NOM MAX UNIT
I2C INTERFACE VOLTAGE LEVEL
f
SCL
Clock Frequency 10 400 kHz
t
LOW
Clock Low Time 1.3 µs
t
HIGH
Clock High Time 0.6 µs
t
SP
Pulse width of spikes that must be 50 ns
suppressed by the input filter
(1)
t
START
Device Start-up time From V
DD
≥ 2.7 V to ready for a 10 15 ms
conversion
(1)(2)
(1) This parameter is specified by design and/or characterization and it is not tested in production.
(2) Within this interval it is not possible to communicate to the device.
Figure 1. I2C Timing
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