Datasheet
Digilent Pmod™ Interface Specification 1.2.0
Copyright Digilent, Inc. All rights reserved.
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Page 11 of 11
5.5 I²C
Pmod Interface Type 6 (I²C)
This interface conforms to the I
2
C specification, plus an optional interrupt and reset pin. If these optional pins are
not used, they will be no connects. The pull-up resistors used to provide the logic high level for SCL and SDA are
provided on the modules and can be attached to or detached from the bus via onboard jumpers. Pull-ups on INT
and RESET, if used, are also provided on the module and can be attached or detached from the bus via onboard
jumpers to enable daisy chaining.
Pin #
Signal
Direction
Alternate Signal
1
NC
INT
2
NC
RESET
3
SCL
In/Out
-
4
SDA
In/Out
-
5
GND
6
VCC
SCL – Serial Clock
SDA – Serial Data
NC – Not Connected
INT – Open drain, active low, interrupt signal from slave to master.
RESET – active low reset signal from master to slave. The system board is the master.
5.6 I
2
S
Pmod Interface Type 7 (I²S CODEC)
This provides the standard connections for an I²S codec interface, plus an optional clock signal used by some I²S
devices.
Pin
#
Signal
Direction
Alternate Signal
Direction
1
LRCLK
Out
-
-
2
DAC Data
Out
-
-
3
ADC Data
In
-
-
4
BCLK
Out
-
-
5
GND
6
VCC
7
GPIO
-
8
GPIO
-
9
GPIO
-
MCLK
Out
10
GPIO
-
11
GND
12
VCC
LRCLK - Left channel/Right channel select
DAC Data - Output data to DAC
ADC Data - Input Data from ADC
BCLK - Serial bit clock.
MCLK - Optional master clock used by some I2S devices