Datasheet

5 Oscillators/Clocks
The Arty S7 board includes a 12 MHz crystal oscillator connected to pin F14 (an MRCC input on
bank 15) and a 100 MHz crystal oscillator connected to pin R2 (an MRCC input on bank 34).
The 12 MHz clock is intended to be used as a general purpose system clock. The clock can drive
MMCMs to generate clocks of various frequencies and with known phase relationships that may
be needed throughout a design. The 12 MHz input clock cannot directly drive a PLL because they
have a minimum input frequency of 19 MHz. Some rules restrict which MMCMs and PLLs may be
driven by the 12 MHz input clock. For a full description of these rules and of the capabilities of the
Spartan-7 clocking resources, refer to the “7 Series FPGAs Clocking Resources User Guide”
available from Xilinx.
Xilinx offers the Clocking Wizard IP core to help users generate the different clocks required for a
specific design. This wizard will properly instantiate the needed MMCMs and PLLs based on the
desired frequencies and phase relationships specified by the user. The wizard will then output an
easy-to-use wrapper component around these clocking resources that can be inserted into the
user’s design. The clocking wizard can be accessed from within the Vivado and IP Integrator tools.
The 100 MHz clock is intended to drive the system clock input of the Memory Interface Generator
(MIG) IP Core to allow for proper use of the DDR3L memory. Section 3 “DDR3L Memory” describes
how to use this clock properly with the MIG. For complete information on using the MIG, see the 7
Series FPGAs Memory Interface Solutions User Guide (ug586) from Xilinx.
6 USB-UART Bridge (Serial Port)
The Arty S7 includes an FTDI FT2232HQ USB-UART bridge (attached to connector J10) that
allows you to use PC applications to communicate with the board using standard Windows COM
port commands. Free USB-COM port drivers, available from www.ftdichip.com under the “Virtual
Com Port” or VCP heading, convert USB packets to UART/serial port data. Serial port data is
exchanged with the FPGA using a two-wire serial port (TXD/RXD). After the drivers are installed,
I/O commands can be used from the PC directed to the COM port to produce serial data traffic on
the V12 and R12 FPGA pins.
Two on-board status LEDs provide visual feedback on traffic flowing through the port: the transmit
LED (LD8) and the receive LED (LD7). Signal names that imply direction are from the point-of-
view of the DTE (Data Terminal Equipment), in this case the PC.
The FT2232HQ is also used as the controller for the Digilent USB-JTAG circuitry, but the USB-
UART and USB-JTAG functions behave entirely independent of one another. Programmers
interested in using the UART functionality of the FT2232 within their design do not need to worry
about the JTAG circuitry interfering with the UART data transfers, and vice-versa. The combination
of these two features into a single device allows the Arty S7 to be programmed, communicated
with via UART, and powered from a computer attached with a single Micro USB cable.
The CK_RST signal (see the Arty S7 Schematic) is also connected to the FT2232HQ device via
JP2. When JP2 is shorted, the FT2232HQ can trigger a Microblaze reset, mimicking the behavior
of Arduino and chipKIT boards when sketches are loaded. Note the CK_RST signal is also
connected to the red RESET button and the RST pin of J7 on the shield connector (these
connections are not shown in Figure 6.1). It is recommended that this jumper is not shorted unless
attempting to run Arduino IDE on Microblaze, because it can interfere with normal Microblaze
function.
The connections between the FT2232HQ and the Spartan-7 are shown in Figure 6.1.