Datasheet

Features
 Xilinx Spartan-7 50 FPGA (xc7s50csga324-1)
o 8,150 slices (each slice contains four 6-input LUTs and 8 flip-flops)
o 2,700 Kbits of fast block RAM
o Five clock management tiles, each with a phase-locked loop (PLL)
o 120 DSP slices
o Internal clock speeds exceeding 450MHz
o On-chip analog-to-digital converter (XADC)
o Programmable over JTAG and Quad-SPI Flash
 Memory
o 256MB DDR3L with a 16-bit bus @ 650MHz
o 16MB Quad-SPI Flash
 Power
o Powered from USB or any 7V-15V external power source
 USB
o USB-JTAG Programming circuitry
o USB-UART Bridge
 Switches, Push-buttons, and LEDs
o 4 Switches
o 4 Buttons
o 1 Reset Button
o 4 LEDs
o 2 RGB LEDs
 Expansion Connectors
o 4 Pmod ports
 32 total FPGA I/O (16 shared with shield connector)
o Arduino/chipKIT Shield connector
 45 total FPGA I/O (16 shared with Pmod connectors)
 6 Single-ended 0-3.3V Analog inputs to XADC
 3 Differential 0-1.0V Analog input pairs to XADC