Data Sheet

3/15/2018 Arty S7 Reference Manual [Reference.Digilentinc]
https://reference.digilentinc.com/reference/programmable-logic/arty-s7/reference-manual 8/22
(https://reference.digilentinc.com/_detail/reference/programmable-logic/arty-s7/arty-s7-bottom-rev.png?id=reference%3Aprogrammable-logic%3Aarty-
s7%3Areference-manual)
The Arty S7 is fully compatible with the high-performance Vivado ® Design Suite versions 2017.3 and newer. It is supported under the free
WebPACK™ installation option - which does not require a license - so designs can be implemented at no additional cost. This free license
includes the ability to create MicroBlaze™ soft-core processor designs, the Logic Analyzer, and High-level Synthesis (HLS). The Logic
Analyzer assists with debugging logic, and the HLS tool allows you to compile C code directly into HDL. Design resources, example
projects, and tutorials are available for download at the Arty S7 Resource Center (https://reference.digilentinc.com/reference/programmable-
logic/arty-s7/start).
(https://reference.digilentinc.com/_detail/arty/arty_vivadoipi.png?id=reference%3Aprogrammable-logic%3Aarty-s7%3Areference-manual) What makes
the Arty S7 so flexible is its FPGA. Among their many features, FPGAs have the ability to transform into a custom software-defined
System-on-a-Chip (SoC). These “Soft SoC” FPGA configurations are designed graphically using a tool called Vivado IP Integrator (Vivado
IPI). In this tool, pre-built peripheral blocks are dragged from an extensive library and dropped into your processing system as you see fit.
These pre-built peripherals include timers, UART/SPI/IIC controllers, and many of the other devices you would typically find in an SoC or
microcontroller. Ambitious users will also find that they can create their own peripheral blocks by writing them in a Hardware Definition
Language (HDL), specifically Verilog or VHDL. For those with no interest in learning HDL, the Xilinx High Level Synthesis tool can be
used to define custom peripheral blocks by writing them in C.
The Arty S7's Soft SoC configurations are powered by MicroBlaze processor cores. MicroBlaze is a 32-bit RISC soft processor core,
designed specifically to be used in Xilinx FPGAs. The MicroBlaze processor in an Arty S7 SoC configuration is typically run at 100 MHz (),
though it is possible to design your SoC so that it can operate at over 200MHz. The Arty S7 supports large MicroBlaze programs with
demanding memory requirements by providing 16MB of non-volatile program memory and 256MB of DDR3L RAM ().
(https://reference.digilentinc.com/_detail/arty/arty_xsdk.png?id=reference%3Aprogrammable-logic%3Aarty-s7%3Areference-manual) After you design
your soft SoC configuration for the Arty S7 you can start writing programs for it. This is done by exporting your SoC design out of Vivado
IPI and into the Xilinx Software Development Kit (XSDK), an Integrated Development Environment (IDE) for designing/debugging
Software Support
Designing with MicroBlaze