Datasheet

Spartan-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS189 (v1.2) June 20, 2017 www.xilinx.com
Preliminary Product Specification 13
Performance Characteristics
This section provides the performance characteristics of some common functions and designs
implemented in Spartan-7 FPGAs. These values are subject to the same guidelines as the AC Switching
Characteristics, page 11.
Table 15: Networking Applications Interface Performances
Description
V
CCINT
Operating Voltage, Speed
Grade, and Temperature Range
Units
1.0V 0.95V
-2C/-2I -1C/-1I -1LI
SDR LVDS transmitter (using OSERDES; DATA_WIDTH = 4 to 8) 680 600 600 Mb/s
DDR LVDS transmitter (using OSERDES; DATA_WIDTH = 4 to 14) 1250 950 950 Mb/s
SDR LVDS receiver
(1)
680 600 600 Mb/s
DDR LVDS receiver
(1)
1250 950 950 Mb/s
Notes:
1. LVDS receivers are typically bounded with certain applications where specific dynamic phase-alignment (DPA) algorithms dominate
deterministic performance.
Table 16: Maximum Physical Interface (PHY) Rate for Memory Interface IP available with the Memory Interface
Generator
(1)
Memory Standard
V
CCINT
Operating Voltage, Speed Grade,
and Temperature Range
Units
1.0V 0.95V
-2C/-2I -1C/-1I -1LI
4:1 Memory Controllers
DDR3 800 667 667 Mb/s
DDR3L 800 667 667 Mb/s
DDR2 800 667 667 Mb/s
2:1 Memory Controllers
DDR3 800 667 667 Mb/s
DDR3L 800 667 667 Mb/s
DDR2 800 667 667 Mb/s
LPDDR2 667 533 533 Mb/s
Notes:
1. V
REF
tracking is required. For more information, see the Zynq-7000 AP SoC and 7 Series FPGAs Memory Interface Solutions User Guide (UG586)
[Ref 6].