Datasheet
7 Series FPGAs Data Sheet: Overview
DS180 (v2.5) August 1, 2017 www.xilinx.com
Product Specification 5
Virtex-7 FPGA Feature Summary
Table 8: Virtex-7 FPGA Feature Summary
Device
(1)
Logic
Cells
Configurable Logic
Blocks (CLBs)
DSP
Slices
(3)
Block RAM Blocks
(4)
CMTs
(5)
PCIe
(6)
GTX GTH GTZ
XADC
Blocks
Total I/O
Banks
(7)
Max
User
I/O
(8)
SLRs
(9)
Slices
(2)
Max
Distributed
RAM (Kb)
18 Kb 36 Kb
Max
(Kb)
XC7V585T 582,720 91,050 6,938 1,260 1,590 795 28,620 18 3 36 0 0 1 17 850 N/A
XC7V2000T 1,954,560 305,400 21,550 2,160 2,584 1,292 46,512 24 4 36 0 0 1 24 1,200 4
XC7VX330T 326,400 51,000 4,388 1,120 1,500 750 27,000 14 2 0 28 0 1 14 700 N/A
XC7VX415T 412,160 64,400 6,525 2,160 1,760 880 31,680 12 2 0 48 0 1 12 600 N/A
XC7VX485T 485,760 75,900 8,175 2,800 2,060 1,030 37,080 14 4 56 0 0 1 14 700 N/A
XC7VX550T 554,240 86,600 8,725 2,880 2,360 1,180 42,480 20 2 0 80 0 1 16 600 N/A
XC7VX690T 693,120 108,300 10,888 3,600 2,940 1,470 52,920 20 3 0 80 0 1 20 1,000 N/A
XC7VX980T 979,200 153,000 13,838 3,600 3,000 1,500 54,000 18 3 0 72 0 1 18 900 N/A
XC7VX1140T 1,139,200 178,000 17,700 3,360 3,760 1,880 67,680 24 4 0 96 0 1 22 1,100 4
XC7VH580T 580,480 90,700 8,850 1,680 1,880 940 33,840 12 2 0 48 8 1 12 600 2
XC7VH870T 876,160 136,900 13,275 2,520 2,820 1,410 50,760 18 3 0 72 16 1 6 300 3
Notes:
1. EasyPath™-7 FPGAs are also available to provide a fast, simple, and risk-free solution for cost reducing Virtex-7 T and Virtex-7 XT FPGA designs
2. Each 7 series FPGA slice contains four LUTs and eight flip-flops; only some slices can use their LUTs as distributed RAM or SRLs.
3. Each DSP slice contains a pre-adder, a 25 x 18 multiplier, an adder, and an accumulator.
4. Block RAMs are fundamentally 36 Kb in size; each block can also be used as two independent 18 Kb blocks.
5. Each CMT contains one MMCM and one PLL.
6. Virtex-7 T FPGA Interface Blocks for PCI Express support up to x8 Gen 2. Virtex-7 XT and Virtex-7 HT Interface Blocks for PCI Express support up to x8 Gen 3, with the
exception of the XC7VX485T device, which supports x8 Gen 2.
7. Does not include configuration Bank 0.
8. This number does not include GTX, GTH, or GTZ transceivers.
9. Super logic regions (SLRs) are the constituent parts of FPGAs that use SSI technology. Virtex-7 HT devices use SSI technology to connect SLRs with 28.05 Gb/s
transceivers.