User Manual

Signal
Direction
(FPGA) Description
RD# Output A low pulse triggers data to be read out from the FIFO.
WR# Output A low pulse triggers data to be written to the FIFO.
SIWU# Output Send Immediate or Wake-up. In normal mode, a low pulse triggers sending a data packet with teh
data currently in the FIFO, even if below the normal packet size. In suspend mode, a low pulse can
wake up the host computer.
OE# Output When low, the data bus is driven by the USB controller (read transfer). When high, the bus is driven
by the FPGA (write transfer).
CLKO Input 60
MHz () clock used in synchronous mode. Data is launched and can be captured on the rising
edge.
Figure 6.2.1 USB104 A7 UART Connections
The USB104 A7 features one Zmod ports, which uses a SYZYGY Standard interface to communicate with an installed SYZYGY pod.
The port is compatible with version 1.1 of the SYZYGY specification from Opal Kelly.
SYZYGY SmartVIO functionality is implemented by the Eclypse's Platform MCU, as discussed in the
1. Power Supplies section of this
document. Each port's SYZYGY DNA is connected to both the Platform MCU and to the Artix-7 FPGA's U16 and V17 pins through a
single I2C bus. Once the board is fully powered on, and the PMCU has configured itself in I2C slave mode, SYZYGY DNA data can be
read directly from the pods, and the negotiated voltages and currents can be read from the PMCU over this bus. In addition, a SYZYGY
detect signal is provided to the FPGA by the PMCU, connected to FPGA pin T11. This signal is asserted to logic '1' when a pod is
connected.
Microblaze support for DPTI is provided by the AXI DPTI IP core which can be found in the

vivado-library
(https://github.com/Digilent/vivado-library) repository on Digilent's GitHub.
The Digilent Adept Runtime can be used with the the Digilent Adept
API () in order to simplify the host side communication through
DPTI. The Adept Runtime can be downloaded through the Adept (https://reference.digilentinc.com/reference/software/adept/start) wiki
page. The Zmod ADC () and Zmod DAC () example projects, which can be found on the USB104 A7 Resource Center
(https://reference.digilentinc.com/reference/programmable-logic/usb104a7/start) include example PC-side applications intended for receiving
and transmitting data through the DPTI interface.
Note: A DSPI interface is also connected, but no demos are provided as of time of writing. Since the interfaces share pins, DPTI and DSPI cannot be used
simultaneously. The pulldown resistor on the SPI enable line means that the default interface is DPTI. SPIEN should be held low or not be driven by the
FPGA while using DPTI.
6.2. USB-UART Bridge (Serial Port)
The USB104 A7's FTDI FT2232HQ USB-UART bridge allows you use PC applications to communicate with the board using standard
Windows COM port commands. Free USB-COM port drivers, convert USB packets to UART/serial port data. These drivers are
included when installing Vivado. Serial port data is exchanged with the FPGA using a two-wire serial port (TXD/RXD). After the
drivers are installed, I/O commands can be used from the PC directed to the COM port to produce serial data traffic on the U12
(UART_TXD_IN, FPGA input) and V12 (UART_RXD_OUT, FPGA output) pins.
Two on-board status LEDs provide visual feedback on traffic flowing through the port: the transmit LED () (labeled “TX”) and the
receive LED () (labeled “RX”), placed adjacent to the USB port. Signal names that imply direction are from the point-of-view of the
DTE (Data Terminal Equipment), in this case the PC.
The connections between the FT2232HQ and the Artix-7 are shown in Figure 6.2.1:
7. Zmod Port