Datasheet

Platform Cable USB
DS300 (v3.3) June 25, 2014 www.xilinx.com
Product Specification 15
R
X-Ref Target - Figure 28
Figure 28: Example of Cascaded Slave-Serial Topology
FPGA
1
FPGA
2
FPGA
n
DOUTDIN
CCLK
DONE
INIT
DOUTDIN
CCLK
DONE
INIT
DOUTDIN
CCLK
DONE
INIT
INIT
CCLK
DIN
DONE
PROG PROGPROG
PROG
V
CCAUX
(2)
V
CCAUX
(2)
Optional
Pull-Up
VCCO
GND
(3)
V
REF
2
6
4
10
14
8
X
2 mm Connector
DS300_25_021507
Notes:
1. Set Mode pins (M2-M0) on each FPGA to Slave-serial mode when using the USB cable, so that CCLK is treated
as an input.
2. V
CCAUX
is 3.3V for Virtex-II FPGAs, 2.5V for Virtex-II Pro FPGAs, or 2.5V for Spartan-3/3E FPGAs. The V
CCAUX
for Spartan-3A FPGAs can be 2.5V or 3.3V. Virtex-4/5 serial configuration pins are on a dedicated
VCC_CONFIG (VCCO_0), 2.5V supply. Other FPGA families do not have a separate V
CCAUX
supply.
3. Attach the following 2 mm connector pins to digital ground: 1, 3, 5, 7, 9, 11, 13.