Data Sheet

PYNQ-Z1 Board Reference Manual

Other product and company names mentioned may be trademarks of their respective owners.

Page 6 of 25

MIO 501 1.8V

Peripherals

ENET 0

USB 0

SDIO 0

DATA7

CCLK

CMD

RESETN

48 (N/C)

49 (N/C)

50 (N/C)

51 (N/C)

MDC

MDIO

Table 2.1. MIO Pinout.

3 Zynq Configuration

Unlike Xilinx FPGA devices, APSoC devices such as the Zynq-7020 are designed around the processor, which acts as

a master to the programmable logic fabric and all other on-chip peripherals in the processing system. This causes

the Zynq boot process to be more similar to that of a microcontroller than an FPGA. This process involves the

processor loading and executing a Zynq Boot Image, which includes a First Stage Bootloader (FSBL), a bitstream for

configuring the programmable logic (optional), and a user application. The boot process is broken into three

stages:

Stage 0

After the PYNQ-Z1 is powered on or the Zynq is reset (in software or by pressing SRST), one of the processors

(CPU0) begins executing an internal piece of read-only code called the BootROM. If and only if the Zynq was just

powered on, the BootROM will first latch the state of the mode pins into the mode register (the mode pins are

attached to JP4 on the PYNQ-Z1). If the BootROM is being executed due to a reset event, then the mode pins are

not latched, and the previous state of the mode register is used. This means that the PYNQ-Z1 needs a power cycle

to register any change in the programming mode jumper (JP4). Next, the BootROM copies an FSBL from the form

of non-volatile memory specified by the mode register to the 256 KB of internal RAM within the APU (called On-

Chip Memory, or OCM). The FSBL must be wrapped up in a Zynq Boot Image in order for the BootROM to properly

copy it. The last thing the BootROM does is hand off execution to the FSBL in OCM.

Stage 1

During this stage, the FSBL first finishes configuring the PS components, such as the DDR memory controller. Then,

if a bitstream is present in the Zynq Boot Image, it is read and used to configure the PL. Finally, the user application

is loaded into memory from the Zynq Boot Image, and execution is handed off to it.