Foreword This manual is for programmers and users of the Programmed Data Processor-4, a high speed, stored program, digital computer manufactured by the Digital Equipment Corporation. Chapters 2 and 3 contain the detailed information necessary to make use of the machine. Chapter 1 summarizes the machine’s electrical and logical design. Chapter 4 presents information helpful in making the electrical connections to inputoutput devices.
Table Of Contents Page CHAPTER 1: SYSTEM DESCRIPTION 5 . . . . .._.._._...__...._._.... ........................................ CHAPTER 2: ARITHMETIC AND CONTROL ELEMENT .......................................................................................................... Functions Control States ................................................................................................... ......................................................................................................
Typical PDP-4 System
CHAPTER SYSTEM 1 DESCRIPTION Summary The Digital Equipment Corporation Programmed Data Processor-4 (PDP-4) is designed to be the control element in an information processing system. PDP-4 is a single address, parallel, binary machine with an 18-bit word length using l’s or 2’s complement arithmetic. Standard features of the machine are stored program operation, a random access magnetic-core memory, a complete order code, and indirect addressing.
ARITHMETIC ------mm -w-----m-- IMTERFACE *Included in B Standard PDP-4 Figure 1 - PDP-4 ARITHMETIC System with Real-Time AND CONTROL Connection ELEMENT The Operator Console, Internal Processor, and Core Memory constitute the Arithmetic and Control Element. The Internal Processor carries out the arithmetic and logical operations and controls the Real-TimeConnection and the Core Memory. Binary arithmetic with a fixed point is employed.
Keyboard and Control, Type 65. The Real-Time Option, Type 25 gives the system the additional capability to operate efficiently over a wide range of information handling rates (from seconds per event to 125,000 words per second) and with a large variety of input-output devices (see Figure 2). The Real-Time Option consists of a Device Selector, an Information Collector, an Information Distributor, an Input-Output Skip connection, a Program Interrupt facility, a Data Interrupt facility, and a Clock/Timer.
. The Perforated-Tape Reader (top) 8 and Printer-Keyboard (bottom).
THE INFORMATION DISTRIBUTOR distributes information from the Internal Processor to all output devices. Only the output device selected (or addressed) by the Device Selector samples and reads in the information contained in the Information Distributor. Up to 8 x 18 bits may be distributed. THE INPUT-OUTPUT SKIP CONNECTION provides a program skip instruction conditioned by the state of a given input-output device logic line.
from the Light Pen, the computer carries out previously programmed instructions. Requires Real-Time Option. THE 18-BIT RELAY BUFFER, TYPE 67-4, provides contacts which operate devices of higher power rating. The relays have form “D” contacts, which open and close in approximately 3 milliseconds. Requires Real-Time Option. THE PROGRAMMED MAGNETIC TAPE CONTROL, TYPE 54, up to four Magnetic Tape Transports, Type 50. Information from or written on the tape.
CHAPTER ARITHMETIC AND 2 CONTROL ELEMENT In this chapter the functions of the Arithmetic and Control Element are described in detail. The operations of the machine instructions are explained and listed. Functions INTERNAL PROCESSOR The Internal Processor performs arithmetic operations, controls memory access, and handles information entering and leaving the machine.
ACCUMULATOR (AC): Arithmetic operations are performed in this 18-bit register. The AC may be cleared and complemented. Its contents may be rotated right or left with the Link. The contents of the Memory Buffer may be added to the contents of the AC with the result left in the AC. The contents of both these registers may be combined by the logical operations AND and Exclusive OR, the result remaining in the AC.
MEMORY The memory contains stored information for processing, and the instructions of the program being run. Memory capacities of from 1,024 to 32,768 words are available in PDP-4. Standard models PDP-4A and PDP-4B come with 1024-word and 4096-word memories, respectively. The two models are identical in all other respects. The smaller memory has a 32 by 32 by 18 core array, the larger a 64 by 64 by 18 core array.
Console Switches Function ADDRESS A group of 13 switches which establishes the memory address for the START, EXAMINE, and DEPOSIT operations. ACCUMULATOR A group of 18 switches, the setting of which determines the word to be placed in memory by the DEPOSIT and DEPOSIT NEXT operations, or to be placed in the AC under program control. POWER Controls the primary power to the computer and all external devices attached to it.
Console Key Function START Starts the processor. The first instruction is taken from memory cell specified by the setting of the ADDRESS. switches. The START operation clears the AC and Link, and turns off the Program Interrupt. STOP Stops the processor at the completion memory cycle in progress at the time operation. CONTINUE Causes the computer to resume operation from the point at which it was stopped by the last previous operation of STOP or one of the EXAMINE or DEPOSIT keys.
and the instruction part (bits O-4) of this word The C(PC) are then incremented by one. are placed in the IR. If a two-cycle instruction is fetched, the following control state will be either Defer or Execute. If a one-cycle instruction is fetched, the operations specified will be performed during the last part of the Fetch cycle. The next state will be Fetch. DEFER: When bit 4 of a memory referehce instruction is a 1, the Defer state is entered to perform the indirect addressing.
01 1121314151617 ~8~9~10~11~12~13~14~15~16~17 vvt1 Operation Indirect Code Address (Defer) Figure 5 - Operand Address Memory INDIRECT reference instruction format ADDRESSING When indirect addressing is specified, the address part (bits 5-17) of a memory reference instruction is interpreted as the address of a cell containing not the operand, but the address of the operand. Consider the instruction add A.
Since bit 0 of a word is used for the sign of a number, the largest positive number that can be represented is 217-l. If, in l’s complement addition, the addends are of like sign and the sign of the sum is different, overflow is said to have occurred and the Link is set to 1. 2’S COMPLEMENT ARITHMETIC In 2’s complement addition (see tad instruction), a carry out of the highorder bit is not added into the low order position. Instead, if a carry occurs, the Link is complemented.
MNEMONIC SYMBOL tad Y xor Y OCTAL CODE (BITS O-3) 34 24 TIME (b-c) 16 16 OPERATION Two’s complement Add. The C(Y) are added to the C(AC) in 2’s complement arithmetic. The result is left in the AC and the original C(AC) are lost. The C(Y) are unchanged. A carry out of the 0 bit corn: plements the Link. C(Y) + C(AC) => C(AC). Exclusive OR. The logical operation Exclusive OR is performed between the C(Y) and the C(AC). The result is left in the AC and the original C(AC) are lost. The C(Y) are unchanged.
MNEMONIC SYMBOL OCTAL CODE (BITS O-3) TIME (ec) is2 Y 44 16 Y 60 8 jms Y 10 16 Jump to Subroutine. The C(PC) and the C(L) are deposited in memory cell Y. The next instruction is taken from cell Y + 1. C(L) => C(Y,). 0 => C(Y,,). cal 00 16 Call Subroutine. The address portion of this instruction is ignored. The action is identical to jms 20. The instruction cal i is equivalent to jms i 20. xct Y 40 iv OPERATION Index and Skip if Zero.
OPERATE CLASS The instructions of the Operate class require one cycle for their execution. The octal code (bits O-3) for this class is 74. The operations specified by bits 4-17 are called micro-instructions. The functions of each microinstruction are described in the following table. The Event Time indicates when the operation is performed in the course of the cycle. Times 0, 1, and 2 occur in that order in the latter part of the cycle.
MNEMONIC SYMBOL OCTAL CODE EVENT TIME OPERATION ral 740010 3 Rotate rotated C(ACJ C(AC,) AC left => => Left. The C(AC) and the one place. C(AC j-~) C(L). C(L) => C(AG7) rtl 742010 2, 3 Rotate Two places successive ral’s. rar 740020 3 Rotate AC Right. The C(AC) rotated one place right. C(ACj) => C(ACj-1) C(L) => C(ACo) C(AC17) =>C(L) rtr 742020 2, 3 Rotate Two Places Right. equivalent to two successive oas 740004 3 OR AC Switches.
MNEMONIC SYMBOL snl szl OCTAL CODE 740400 741400 EVENT TIME OPERATION 1 Skip if Non-zero Link. instruction is skipped. If C(L) # 0, then C(PC) 1 Skip if Zero 740040 immediHalt. ately after the completion of the cycle. Stops is 1, the + 1 => C(PC). + 1 => C(PC). next Link. If C(L) = 0, then hlt If C(L) C(PC) the computer. If skips are combined in a single instruction, ditions to be met will determine the skip.
Operation Code Sub-Device Selection Device Selection Sob-Device Selection ,&$qfyhJl 0 1 2 If Bit Is a 1: 3 4 5 6 7 8 9 10 11 12 13114115116[17 Clear AC at event time 1 Transfer an IOT pulse at event time 3 Transfer an IOT pulse at event time 2 Transfer an IOT pulse at event time 1 Figure 7 - Bit assignment for input-output 24 transfer instruction (iot)
CHAPTER INPUT-OUTPUT FUNCTIONS AND 3 EQUIPMENT PROGRAMMING PDP-4 is capable of operating with the ten input-output devices described in Chapter 1 and with a variety of others. The computer can operate with most of the devices simultaneously. The Interface, consisting of the RealTime Connection or the Real-Time Option, issues commands to the devices, monitors their state of availability, transfers information to them, and receives information from them.
(b) Transfers data from the information buffer of an input device to the AC, through the Information Collector (c) Transfers information from the AC, through the information tributor to the buffer of an output device (d) Senses the flag(s) associated with a device to determine ability Dis- its avail- (e) Resets the flags. These commands dismiss a device without asking for additional action. The flags referred to above are signals generated by an external device upon completion of its assigned task.
DISTRIBUTOR Requests From (11) IO Device Flags 4 INTERRUPT Data ) Request Acknowlaged INTERRUPT !&I& oirection DATA INTERRUPT ADDRESS - 18 Addreas DATA INTERRUPT INFORMATION (W Figure 8 - -0 Real Time 27 Option, Type 25 18 Outgoing Data
INFORMATION DISTRIBUTOR (ID) The Information Distributor presents the static data contained in the AC to each output device requiring AC information. The devices sample the Information Distributor using the program-controlled pulses from the Device Selector. The program steps for transmitting information from a particular memory cell are: lac Y Load the AC with iot Clear selected iot transmit The information is sampled and placed in the register of the input-output device.
INPUT- OUTPUT STATUS INSTRUCTION The iors (in-out read status) instruction, 700314, enables the status of all IO devices to be read into the AC and sampled. Various IO device states are indicated by the presence of a 1 or 0 in the bit positions allocated for that device (see Figure 9).
Input-Output Devices All of the Input-Output Devices discussed below can be controlled by the Real-Time Option, Type 25. The Real-Time Connection, furnished as standard equipment, provides communication between the Internal Processor and the Perforated-Tape Reader, the Perforated-Tape Punch and Control, and the Printer-Keyboard and Control. All devices except the Perforated-Tape Reader are optional. This section is arranged in the order of increasing complexity of connection.
The CRT, Type 30A is selected when the numbers 0 and 5 (octal) are specified in bits 8 and 9 respectively, of the iot instruction. The display commands are: dls - 700506 - Load the Display Buffer and select the display. The program loads the Display Buffer from the AC. A point is plotted as specified by the C(Display Buffer). The plotting requires 50 microseconds, after which another dls can be given. The Light Pen flag or Display flag is cleared with dls.
LIGHT PEN, TYPE 32 The Light Pen is a photosensitive device which detects the presence of information displayed on a CRT. If the Light Pen is held in front of the CRT at a point displayed, the Display flag will be set to a 1. The Pen is specified by 0 and 5 in bits 8 and 9 of the iot instruction. The commands are: dsf - 700501 - Skip if Display dcf - 700502 - Reset the The Display flag is connected Program Interrupt. - (Bit 5) flag is a 1. Display flag to a 0.
The instructions are: dsf - 700501 - Skip if the Display flag is a 1. The when the Light Pen senses light. dcf - 700601 - Clear the Display dxl - 700506 - Load the C(XB) with dyl - 700606 - Load the C(YB) with C(ACX.17). dxs - 700546 - Load the C(XB) with C(ACX-17). Plot the point: C(XB), C(YB). dys - 700646 - Load the C(YB) with C(ACx-li). C(XB), C(YB). dlb - 700706 - Load the Brightness Register with AC bits 15-17.
The Display flag is connected to the Program Interrupt iors instruction. The co-ordinates of the corners are: 0, 1777 . l 1777, and to bit 5 of the 1777 -T 9x 21° points x = 0, Y = 0 . 1777,o l r 21U9$Znts q PROGRAM /display lO/ 40/ a point /x . . /Y bits 8-17 10 dxl lac SEQUENCE 30d . .
(8) Information 8 BIT ANALOG TODIGITAL CONVERTER 4 Analog Input cl10s q PIG Figure 13 - High-speed analog-to-digital converter programming logic A program sequence to sample a function at the input to the converter, and store the result in memory register 10 would be: PROGRAM SEQUENCE /analog-to-digital W 421 SCi dac 10 converter /location of sampled /places sample in /deposit result result AC LOW SPEED ANALOG-TO-DIGITAL CONVERTER (TYPICAL INPUT DEVICE) An analog-to-digital conve
skips if the conversion is complete; i.e., the converter program instructions, iot series 11, are: asf - 701101 - Skip if the converter arb - 701112 - Read converter ase - 701104 - Start 701102 - A micro-instruction C(converter buffer) flag is a 1. buffer the converter flag is a 1. The and clear and clear converter flag. the converter which clears the V C(AC) => C(AC). flag. converter flag, and The converter flag might connect to the Program Interrupt.
MB?, (Alphanumeric) (18)RBIlnformationj Feed 8 Holes of Information PERFORATEDTAPE READER CONTROL m*kip) 1 , Reader Flag I Figure 15 - * 0 PERFORATEDTAPE READER Run Signal (Clutch Engaged, Brake 1 I Perforated Hole I -Tape Status Reader 1 programming 2 2.g3 MS Single Character Bit: logic 3.3 Time Char. Avail. In RB Reader Engaged Flag 0 11 RSB ll * I I Char. Avail.
An alphanumeric character is one line (5, 7, or 8 holes) on tape. A binary word consists of three consecutive characters (18 bits) on tape which have the 8th hole present. Only 8-hole tape is used in the binary mode; the 7th hole is ignored. The first, second, and third six-bit characters are the left, middle, and right thirds, respectively, of the 18-bit word.
The signals to and from the KSR to the control logic are standard serial, 7.5-unit-code Teletype signals. The signals are: start (1.0 unit), information, bits 1-5 (1.0 unit each), and stop (1.5 units). Figure 17 illustrates the current pattern produced by the binary code 10110. 0 (Current) 1 Unit = 33.33MS 1 Start Signal Figure 17 - 100 MS 1 i 1 1 Bit 1 i 1.
KEYBOARD CONTROL To Printer - Status Bit: 03 Keyboard Interrupt: Keyboard Figure 19 - Keyboard programming Flag Flag logic The Keyboard flag is connected to the Program Interrupt Control and the iors instruction, bit 3. A simple sequence which “listens” for keyboard inputs is: PROGRAM SEQUENCE /listen 400/ loop for keyboard ksf /skip when a character /read in the character arrives from keyboard Jmp 400 krb The sequence following the listen sequence beginning.
the Teleprinter flag. The Flag is connected to the Program Interrupt and to bit 4 of the iors instruction. The printing rate is ten characters per second. The instructions for the printer are: tsf - 700401 - Skip if Teleprinter tls - 700406 - Load the Teleprinter from flag. Select the Teleprinter tcf - 700402 - Clear 700404 - C(AC) V C(TB). 0 10 flag is a 1. the Teleprinter clear the Teleprinter flag. Print 30 20 AC bits 13-17, for printing. a character.
/wait for previously printed character tsf /wait loop until jmp.-1 /return t1s . . /print to wait completion, previous then print character printed loop beginning the new character In the first sequence above, 20 milliseconds of program time is available between that tls and the next one that can be given. In the second sequence, 100 milliseconds of program time is available between that tls and the next one that can be given.
psf - 700201 - Skip if the Punch pcf - 700202 - Clear pls - 700206 - Load a character into PB hcom AC bits 10-17. flag. Punch the specified character. 700204 - C(PB) V C(AC)=> 0 the 2 flag is a 1. Punch 4 flag. C(PB). 8 8 Punch the C(PB). lo 11.3 12 14 162 Clear the Punch MS Fixed* Ref. Flag PLS PCF I I 01 lOr Load PB Punch Action 1 Buffer Must Be Loaded By This Time to AIIow 63.
8 Info. PERFORATED TAPE PUNCH CONTROL Feed + Advance * * Punch Timing Signal TELETYPE BRPE TAPE PUNCH * Figure 23 - CARD Perforated-Tape READER Punch programming AND CONTROL, logic TYPE 41-4 The control of the Card Reader is different than the control of other input devices, in that the timing of the read-in sequence is dictated by the device. Once the command to fetch a card is given, the Reader will read all 80 columns of information in order.
instruction transfers the lower six rows (4, 5, 6, 7, 8, and 9). The mode is specified with the Card Read Select instruction. The mode can be changed while the card is being read. MS 0 20 40 60 80 10 908120 140 160 180 200 220 240 280 298~00 Or CRSB Cm CRSA &B Card I 15 psec Next CRSA Card Reader Flag 300 ~sec CRRB 80-Column Ready Signals Every 2.
The Card Read Flag is connected to the Program Interrupt Control and to bit 9 of the iors instruction. The Card Read Done status level bit is connected to bit 10 of the iors instruction. A Card Read Malfunction status is connected to bit 11 of the iors instruction. Card Read Malfunction status indicates one or more of the following conditions: Reader not ready (power off, etc.), hopper empty, stacker full, card jam, validity check error (if validity is on), or real circuit failure.
next row. A flag indicates that the buffer is ready to load. The commands for the Card Punch Control, iot series 64, are: cpsf - 706401 - cpcf - 706402 - Clear cpse - 706442 - Select punch cplb - 706406 - 0 Skip if Card Punch flag is a 1. The Card Punch flag indicates the Punch buffer is available, and should be loaded. Card flag. the Card Punch. Transmit die from the hopper. a card to the Load the Card Punch buffer from the C(AC). structions must be given to fill the buffer.
Status Bits: 13-Row Flag M-Card Not OK Interrupt: Row Flag Figure 27 - Card Punch programming logic PROGRAM SEQUENCE /sequence /5 /in to punch 12 rows of data on a card. consecutive register cardph, registers beginning Each row is stored in location 100. in The program begins cardph.
is2 temp2 jmp loop2 lsz /test templ for 12 rows jmp loop1 hlt /end punloc, 100-l /location rowct, -14+1 /I2 rows grpct, -5+1 /5 groups templ, 0 /row temp2, 0 /group AUTOMATIC LINE PRINTER punching 1 card of card per card per image row counter counter AND CONTROL, TYPE 62 The Line Printer can print 600 lines of 120 columns per minute. Each column has 64 characters. Spacing rate is approximately 132 lines (or two 66-line pages) per second.
A complete line, or 120 columns of information, is placed in the printing buffer. Six bits specify each character (the codes are given in Appendix 2). The information is transferred to the printing buffer through the AC, three characters at a time from AC bits O-5, 6-11, and 12-17. Forty load print buffer instructions fill the 12Ocolumn line. After the printing buffer is loaded, a print instruction is given which prints the contents of the buffer. The action of printing does not disturb the printing buffer.
PROGRAM SEQUENCE /sequence to /characters /Data /in print per begins process /begin print, of a line 120 columns. 2000. Sequence a line previously Output stored 3 word. In of of register printing assumes printer Is assigned. "print" is prog. lpsf /wait till previous printing done AC)iot 10 clears jmp.
CHAPTER 4 THE INTERFACE ELECTRICAL CHARACTERISTICS As explained in previous sections, the standard Interface contains the Real-Time Connection, which can operate only with the Perforated-Tape Reader, the Perforated-Tape Punch, and the Printer-Keyboard. The RealTime Option can operate with a variety of external devices over a wide range of information handling rates.
Common IOT 1 Common IOT 2 Common IOT 3 Figure 29.Typical Pulse Amplifier, Type 4605, used in PDP-4 Device Selector. Example shown is wired to pass The six-level AND gate will pass the iot address 001101. only that address if it is present in the instruction word from the Memory Buffer, thus enabling three AND gates to pass three IO pulses to the pulse amplifier. The Device Selector modules are delivered with jumpers across the address terminals.
INFORMATION COLLECTOR (LOCATION 2H8-25) The information collecting sequence begins with an iot pulse from the Device Selector applied to the strobe input of the Information Collector. The IC then ANDs with the input device information present level and the results are transmitted to the AC. The results of the AND functions are mixed, or ORed together, to enable eight 18-bit-word devices to read data into the AC.
INPUT-OUTPUT SKIP FACILITY (LOCATION 2H06) There are 8 inputs to Input-Output Skip. The iot pulses from the Device Selector strobe an input line and if a logic condition is present, the instruction following the iot will be skipped. The conditions for skipping are: -3 skip volts 0 volts The iot skip pulse must The IOS consists nections are: do not skip I occur at event time of a Capacitor-Diode Gate, Type 4129.
c/UN I KUL Signals Data lntwrupt Request I I 3.6 &c 3.5 J&c Maximum Time To Avoid Another Interrupt Minimum Acknowledgment Time Address frafisf& A0=6pted ” 2.
APPENDIX Instruction MEMORY 1 Lists REFERENCE INSTRUCTIONS OCTAL CODE TIME (b-3 cal Y 00 16 Call Subroutine. Y is ignored jms 20 if bit 4 = 0, jms i 20 if bit 4 = 1. dac Y 04 16 Deposit jms Y 10 16 Jump to subroutine. C(PC) => C(YS.,i)r C(L) => C(Y”>, Y + 1 => C(PC) dzm 14 16 Deposit lac Y 20 16 Load xor Y 24 16 Exclusive OR. C(AC) add Y 30 16 Add (l’s complement). tad Y 34 16 2’s complement xct Y 40 8+ Execute. isz Y 44 16 Index and skip if 0.
OPERATE MNEMONIC CODE OCTAL CODE INSTRUCTIONS EVENT TIME OPERATION Operate. nw 740000 740000 - No Operation. cma 740001 3 Complement, C(AC) cml 3 3 Complement Link, oas 740002 740004 las 750004 2,3 Load AC from Switches. C(ACS) => C(AC) ral 740010 3 Rotate C(ACj) C(AC,,) rcl 2, 3 2, 3 Clear rtl 744010 742010 rar 740020 2 Rotate AC + Link right one place.
BASIC MNEMONIC CODE IOT INSTRUCTIONS OPERATION OCTAL CODE Interrupt iof ion 700002 700042 turn turn iors 700314 read clsf clef clan 700001 700004 700044 Clock skip if clock flag is 1 turn off clock, clear clock flag turn on clock, clear clock flag rsf rsa rsb rrb 700101 700104 700144 700112 Paper tape reader skip if reader flag is a 1 select reader for alphanumeric, clear reader select reader for bry, clear reader flag read the reader buffer into AC, clear reader Psf Pls Pcf 700201 700206 70
BASIC IOT INSTRUCTIONS (continued) MNEMONIC CODE OPERATION OCTAL CODE mci mrs mli msc msi msf mrl 70700 1 707012 707005 707101 707201 707301 707112 mrm 707202 mrr 707302 mwl mwm mwr 707104 707204 707304 Magnetic tape type 54 clear tape instruction and character buffer read tape status into AC load instruction buffer skip if character is present for reading clear interrupt flag and select interrupt skip if the tape flag is a 1 (end of record) clear AC, read character buffer into AC left clear ch
APPENDIX 2 Codes FIO-DEC a A b B c c d D e E f F g G h H i I k J k K I L mM n N 0 0 P p 2 s s t T u u v v WW x x Y y z z O--t 1 ” 2 ’ 342 5 v 6A 7 < 8 > 9 T High order 01 00 61 62 63 64 bits 10 11 Low order bits 0000 0001 0010 0011 0100 0101 0110 0111 :: 76; 71 41 42 43 44 45 46 47 50 51 22 23 24 25 26 27 30 31 20 01 02 03 04 05 06 07 10 11 CODE 1000 1001 1010 1011 1100 1101 1110 1111 /? : 5 -+ ;j .
TELETYPE High 01 00 Low order bits 000 001 010 011 100 101 110 111 T 5 car ret 09 space H# N , M.
CARD A B C D E F G H I J K L M 61 62 READER CODE High 01 00 order bits 10 11 Low order bits E-z 65 66 67 0000 blank - + C&l 0001 1 I J A 57 41 42 43 44 0010 2 S K B 0011 3 T L C 0100 4 U M D E 44; 0101 5 V N E ; :?I 0110 6 W 0 F SR _ T u V W X Y Z 0 ;: 0111 7 X P G z 2’5 26 27 1000 8 Y Q H 1001 9 Z R I 1010 0 1011 = C#l 9 $ 1100 ’ C@l ( C%l * CARD CODE 337 A: : 3 4 5 6 7 8 9 + I = :z Zone digit no zone :7 60 no punch 1 2 3 4
LINE PRINTER CODE High order A B C D E F G H I J K L M N 0 P 00 01 R s T U V W X Y z 0 61 62 63 64 65 66 67 70 71 41 42 43 44 45 46 47 50 51 22 23 24 25 26 27 30 31 20 1 01 2 3 4 5 6 7 8 9 02 03 04 05 06 07 1100 3 > 1101 V T 1110 A 10 11 1111 < ; f4 3 v A < $ = > ( - 13 14 15 16 17 Q 52 53 54 55 57 56 10 bits 11 Low order bits 0000 space I, ‘> 7 --f ? x + 1 space 0 0 0001 1 I J A 0010 2 S K B 0011 3 T L C 0100 4 U M D 0101 5 V N E 0110 6 W 0
APPENDIX 3 Mode Sequence Read-h The initial data input to PDP-4 is made using the keys and switches on the Operator Console. A small program read in manually can be used to read in a somewhat larger program from perforated tape. An example of such a routine is given below. It can also be used to read in other programs from perforated tape. READ-IN LOADER The purpose of the read-in loader is to load programs punched in “read-in mode,” such as the block format loader described below.
BLOCK The block format format: dac A -N N data words Check sum FORMAT LOADER loader will read a block format binary tape of the following A is the address of the first data word /complement of number of data words in block /data words /sum of every word in block, except check sum The routine occupies register 7737 to 7761, and uses the read-in loader subroutine to read each binary word.
APPENDIX PDP-4 4 Assembly Program The more important characteristics of the PDP-4 Assembly Program are mentioned briefly here to provide the background necessary to understand the programming examples in this manual. The program and its complete description are furnished to purchasers of PDP-4. CHARACTER SET: The character set includes digits 0 through 9, letters a through z, and the following punctuation characters: Punctation + A A V ( 1 .
SYLLABLES: A syllable can take several forms. It can be a value symbol, a period ( . ), a flexowriter input pseudo-instruction (flex or char), or a constant (a word enclosed in parentheses). Examples: al 100 lz2 flex abc flex now K” a + l) a bcdef WORDS: A word is a string of syllables connected by the arithmetic operators plus, minus, space, AND or OR, delimited on the left by tab, carriage return, left parenthesis, or equals sign, and on the right by a tab or carriage return.
PSEUDO INSTRUCTIONS FLEXOWRITER INPUT PSEUDO INSTRUCTIONS: The pseudo-instruction, flex A& causes the (six-bit) FIO-DEC codes for the three characters following the space (A) to be read into one word which is taken as the value of the syllable. The code for the character a will go into bits O-5 of the word, for p into bits 6-11, and for y into bits 12-17. The code is a six-bit character, the first five of which are the FIO-DEC code, the sixth a 1 for upper case or a 0 for lower case.
APPENDIX Multiply and Divide MULTIPLY /PDP-4 /calling /time 5 Subroutines SUBROUTINE ones complement single precision multiplication subroutine sequence: /lac multiplier /jms mult /lac multiplicand /return; low order product in AC, high order product in mp5 = 2.6 msec. for non-zero cases, approximately 100 microsec. for zero.
DIVIDE /PDP-4 /calling /greater divide, SUBROUTINE ones complement divide subroutine sequence: /lac high order dividend /jms divide /lac low order dividend /lac divisor /return; quot. in AC, rem. in dvd. if high dividend is than divisor, no divide takes place and L=>l. Time = 3.
DIVIDE SUBROUTINE (continued) dv2, lac quo ral dac quo isz dvl imp dv3 lac dv5 ral lac dvd spl cma dac dvd iac dv4 ral lac quo spl cma + cll jmp i divide opr start 72
APPENDIX 6 Programming The following programming Aids aids are supplied with the PDP-4. PDP-4 ASSEMBLY PROGRAM -A one-pass assembler which allows mnemonic symbols to be used for addresses and instructions. Constants are automatically assigned. Text statements may be written for printing at run time, and a decimal mode may be specified. Up to six character symbols may be used, and the symbol table may be punched on paper tape for use with the debugging tape below.
OCTAL DEBUG -A simple debugging routine. MISCELLANEOUS INPUT-OUTPUT ROUTINES-Octal, decimal, double precision input and output and special Teletype conversion routines. DEMONSTRATION PROGRAMS - Included are: Three Point Display (Tri-Pos), Pen Follow, Type-in Character Display, and Character Punch. FLOATING POINT FUNCTIONS-Allows various functions to be computed, such as double precision sine, cosine, tangent, exponents, log base e, and square root.
APPENDIX Powers 2" ” 0 I 2 4 9 I8 36 72 144 288 576 I 152 I 2 4 8 17 35 70 140 281 562 125 251 503 007 014 028 057 II5 230 460 921 I 2 4 8 I7 34 68 137 274 549 099 199 398 796 592 184 358 737 474 949 899 799 599 199 398 797 594 188 376 752 504 I 2 4 8 16 33 67 134 268 536 073 147 294 589 179 359 719 438 877 755 511 023 046 093 I86 372 744 488 976 953 906 813 627 254 509 018 037 075 I51 303 606 2 4 8 16 32 64 128 256 512 1 024 2 048 4 096 8 192 16 384 32 768 65 536 131 072 262 144 524 288 048 576 097
DIGITAL F-45 EQUIPMENT CORPORATION Printed . in U.S.A.