User`s guide

Figure 5–4 (Cont.) HS Array Controllers Flashing OCP LED Error Codes
Reset 1 2 3 4 5 6
Description of Error
Action
14 The controller DRAB chip failed to verify
the EDC correctly.
Replace controller
module.
Replace controller
module.
15 The controller DRAB chip failed to report
forced ECC.
Replace controller
module.
16 The controller DRAB chip failed some operation
in the reporting, validating, and testing of the
multibit ECC memory error.
Replace controller
module.
17 The controller DRAB chip failed some operation
in the reporting, validating, and testing of the
multiple single-bit ECC memory error.
Replace controller
module.
18 The controller main memory did not write
correctly in one or more sized memory transfers.
Replace controller
module.
1A
The controller DRAB chip did not report an I-to-N
bus timeout when accessing a “reset” host port chip.
Replace controller
module.
1B The controller DRAB did not interrupt the
controller processor when expected.
Replace controller
module.
1C The controller DRAB did not report an NXM error
when nonexistent memory was accessed.
Replace controller
module.
19 The controller did not cause an I-to-N bus
timeout when accessing a “reset” host port chip.
Replace controller
module.
1D The controller DRAB did not report an address
parity error when one was forced.
Off Lit continuously Flashing
I/D = Instruction/Data (cache on the controller module)
DRAB = Dynamic RAM Controller and Arbitration Engine (operates controller shared memory)
ECC = Error Correction Code
EDC = Error Detection Code
SRAM = Static RAM
NXM = Nonexistent Memory
Replace controller
module.
1E
There was an unexpected nonmaskable interrupt
from the controller DRAB during the DRAB
memory test.
Replace controller
shelf backplane.
1F Diagnostic register indicates there is no cache
module, but an interrupt exists from the nonexistent
cache module.
Replace controller
module.
20 The required amount of memory available for the
code image to be loaded from the program card
is insufficient.
Replace controller
module.
13 The controller DRAB chip failed to detect forced
parity, or detected parity when not forced.
(continued on next page)
5–22 Controller Operations