Specifications
riul~1
SlavG
Product
Re£erence
Manual
Appendix
H
•
1£_
...
DUAL
ASVNCHRONOUS
RECEIVER/TRANSMITTER
(DUART)
SCN2681
SERIES
-=
DESCRIPTION
Tt-e
SigMlics
SCN2681 Dual
Uni'Wersal
AS1nChronous
Recoivor/Tr<lnsmittgr
(DUARn
is
a
single
chip
MOS·LSI
com·
m!,;r.i:allons device that provides
1....,0
I.,.
depend!)nt
full·duplex
as~nchronou,
receiver
tran3milter
channels
in
a '.lingio
paCKJge.
It
interfaces
directly
with
micro·
pr::cessor,
and may be used in d
polled
or
interrupt
·J~i"len
sistem.
T~e
operatlna
modo
and
data
format
of
eaCh
channel can
te
programmed inde·
p6ndently.
Additionally. each rar.eiver
ard
Ir."smitter
Coln
select
its
opera.ting spoed
.&.
cr.e
of
eighteen fixed baud (1t6S. a
16x
c,ock
.:!9riv.d
'~om
a programlT'aolo
CO..lnter!timer,
or
In
exterl"al
1x
or ,
Jl(
ClOCK.
The oaud rate generater and
counterit
mer
can cporato
J'reclly
from
:l
crys!al
or
'rem
exter"al
clock
inp'Jls. The
at]ility
to independently program
:he
operating
!peed
cf
Ihe
receiver and trans·
IT\:rter
lTIaKe
tl'le
DUA"T
p:arllcu:,ul.,. attrac·
tlve
for
d:.al·speOd channel apPlicatlOI"S
such
as
clus!ered
terminal
s~stems.
Each
rece~vtlr
IS
Quadruply
buffered
10
",ir.,mi.:e tho
potential
of
receiver overrun
or
:0
red~ce
Interrupt ovorhead
In
inler·
rupt
driv"!n systems, In addition. a
flow
control
::apability is provided
to
disaolO a
remote
utJAHT
trlnsmitter
Nhen
:1'10
buf·
fer
-:1
Inerece,v,n~
device ;s
foJlt.
Also
p~ovlde(]
on t,-o SGN2681 are
'}
multi·
purpose
7·bit
Input
port and a
multipur·
pose
S·bll O.Jlcut
oott,
The!.e .::In
':0
used
as
get'eral
~I.rpo~tl
110
p"rt5
:>r
:an
00
asslQned spec!flc
fun":li~ns
,5.JCh
13
clccK
l:'Iputs
or
sla:uSilnlerrupt
OlJI~UI:5)
u"'Jer
prOGram
c:;nlrol.
11':0 SCN:681
'5
.iVil;oable in
:I""e
,JaC".il~e
verSions 10 sallSI';
IIdflOU:5
sy:HI~m
r~ql.,'e·
mems;
40·p,n
ard
23·cin, !:o!h
0,15·
','oIije
i):Ps. ar.d a comp,lCI
24·;:1ln.
0.4'
N.l!e.
DIP
FEATURES
•
DUAl
full·duplex
uynchronoul
roeo/vorl
Ir:lnomitor
• QUAdruple
buff~red
racoivor data
rOQI
..
lorG
• ProgrammAblo
dlltll
formQI
-5
to
I)
data
bil;
plu.
parity
-Odd.
ovon, no
parity
or force
parity
-1,
1.5
or
2 atop
bits
progrlmmablD
In
1/16
bll
Incromon',
• ProgrAmmable
btud
rDlo
for
oach
r.
colver and
Iranlmitcr
solecloble from:
-111 fixed Ullom: 50
to
38
..
1K
baud
-Ono
usor defined
ralo
dorlved
from
progrllmmeblo
tlmor/count.r
-Ell.I;)rnal
h or tSx
clock
• Parity. !r:lming.
;snd
ovorrun
.rror
dolDC·
lion
• Faleo
.tllrl
bit
dolection
• Lino break
dotoction
and genoralion
• Programmablo channol
modo
-Normal
(full duplox)
-Automatic
echo
-LOCAl
loopback
- Romoto loopbACk
•
Multl·functlon
prog'rommllblo 10·blt
countorllimor
•
Multl·function
7,billnput
por'
•
-Can
IONO
ID
clock
or
conlrollnpUIG
-Chonoo
0'
stahl
dOloction on
four
inputa
•
Multl·function
a·blt
oulpul
por'
-Individual
bit
sollroool
capability
-Oulputs
clln
b:l progrcmmod 10 bo
stalulJlnlorrupt
signal a
• Vorsatilo InlGrrupl
iyatom
-SinOlo
intorrlJP~
outpul
with
.Ighl
mukablo
inlerruptlng
condition.
-Output
port
can bo
conflgurod
to pro-
vido
II
lotlllo'
up
10
six separato
wlr.
OR'abla
Interrupt
oulpull
• MAXimum dala
transhu:
1 X - 1
MB/IOC,
16X
- 125KB/soc
•
Automatic
wak.·up
modo for
multidrop
applicatlono
• Slarl·ond
bro."
Interrupllsto'ul
• Dotocta brOllk
which
origlnalol
in
tho
m:ddlo
of
D ch4'lr&ctor
• On·chip
cryslal
oscillator
• TTL
compatlbl.
• 51nglo +
SV
power 'Supply
Sign.tics
2681
DUART
Device
Specifications
PIN CONFIGURATION
01>5
on
01
05
01
AXOD
.;
TXOD
,
01
~:-,
CEN
RUIT
X2
TXOA
ON
DO
D2
Ot
CI
Vee
IPZ
CEN
RESET
Il2
AO
vcc
CElli
'(lICllt
I.
RlIOA
L
'
::::
ONO
'2
.).
'NT"'"
~----'
TOP VIEWS
------------------~
Page
H-l