Technical data

BIOS and System Programming
76 VIPA GmbH CP486 ⋅ 00/14
4.3.8.4 Configuration Example: Bank Operation (4 Banks with each 64 Byte)
Configuration:
Number of banks: 4
Bank capacity: 64 Byte
PLC initial address of the bank: F500(hex) (Note: the initial address must be
in the Fxxx(hex) range)
Specified bank numbers: 16..19 (Note: the first number must be multiple
of the number of banks.)
Bank selection in the PLC: Bank select register FEFF(hex)
Register parameterization:
Ident register (C800:1F80): 13(hex) (corresponds to the highest bank number)
Bank initial register 1 (C800:1F84): 50(hex)
Bank initial register 2 (C800:1F86): 01(hex)
Configuration register (C800:1F82): 73(hex)
Interrupt reset register (C800:1F8E): 00(hex)
Interrupt in the CP486:
In the CP486 an interrupt is initiated by an PLC write access to the highest
bank element at address F53F(hex).
Address assignment:
Bank PLC address CP486 address
16 F500 - F53F C800:3C00 - C800:383F
17 F500 - F53F C800:3800 - C800:383F
18 F500 - F53F C800:3400 - C800:343F
19 F500 - F53F C800:3000 - C800:303F