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DMP2018LFK

Document number: DS35357 Rev. 5 - 2

1 of 7

www.diodes.com

March 2012

DMP2018LFK

ADVANCE INFORMATION

NEW PRODUCT

P-CHANNEL ENHANCEMENT MODE MOSFET

Product Summary

(BR)DSS

DS(on)max

= 25°C

-20V

16m @ V

= -4.5V

-12.8A

25m @ V

= -2.0V

-10A

Description and Applications

This new generation MOSFET has been designed to minimize the on-

state resistance (R

DS(on)

) and yet maintain superior switching

performance, making it ideal for high efficiency power management

applications.

• DC-DC Converters

• Power management functions

• Notebook PC Applications

• Portable Equipment Applications

Features and Benefits

• Low On-Resistance

• Low Input Capacitance

• Low Input/Output Leakage

• ESD Protected Gate up to 2kV

• Lead Free by Design, RoHS Compliant (Note 1)

• "Green" Device (Note 2)

• Qualified to AEC-Q101 Standards for High Reliability

Mechanical Data

• Case: U-DFN2523-6

• Case Material: Molded Plastic, "Green" Molding Compound.

UL Flammability Classification Rating 94V-0

• Moisture Sensitivity: Level 1 per J-STD-020

• Terminals: Finish ⎯ NiPdAu over Copper leadframe. Solderable

per MIL-STD-202, Method 208

• Weight: 0.008 grams (approximate)

Ordering Information (Note 3)

Part Number Case Packaging

DMP2018LFK-7 U-DFN2523-6 3,000 / Tape & Reel

DMP2018LFK-13 U-DFN2523-6 10,000 / Tape & Reel

Notes: 1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. No purposely added lead. Halogen and Antimony free.

2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com.

3. For packaging details, go to our website at http://www.diodes.com.

Marking Information

Date Code Key

Year 2011 2012 2013 2014 2015 2016 2017

Code Y Z A B C D E

Month Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec

Code 1 2 3 4 5 6 7 8 9 O N D

U-DFN2523-6

Bottom View

Equivalent Circuit

P8 = Product Type Marking Code

YM = Date Code Marking

Y = Year (ex: Y = 2011)

M = Month (ex: 9 = September)

Source

Gate

Protection

Diode

Gate

Drai

ESD PROTECTED TO 2kV

Pin 1, 2 = Source

Pin 3 = Gate

Pin 4, 5, 6 = Drain

Pin 1

Summary of content (7 pages)

PAGE 1
DMP2018LFK P-CHANNEL ENHANCEMENT MODE MOSFET Features and Benefits RDS(on)max ID TA = 25°C 16mΩ @ VGS = -4.5V -12.8A 25mΩ @ VGS = -2.
PAGE 2
DMP2018LFK ADVANCE INFORMATION NEW PRODUCT Maximum Ratings @TA = 25°C unless otherwise specified Characteristic Symbol VDSS VGSS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (Note 5) VGS = -4.5V Steady State t<5s Continuous Drain Current (Note 5) VGS = -2.
PAGE 3
DMP2018LFK Characteristic OFF CHARACTERISTICS (Note 7) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current TJ = 25°C Gate-Source Leakage ON CHARACTERISTICS (Note 7) Gate Threshold Voltage Symbol Min Typ Max Unit BVDSS IDSS IGSS -20 - - -1 ±2 V μA μA VGS = 0V, ID = -10mA VDS = -20V, VGS = 0V VGS = ±10V, VDS = 0V VGS(th) RDS (ON) |Yfs| VSD 10 12 13.6 20 17 0.7 -1.2 16 20 25 1.2 V Static Drain-Source On-Resistance -0.45 10 - VDS = -10V, ID = -200μA VGS = -4.5V, ID = -3.
PAGE 4
VGS = -2.5V 0.01 VGS = -10V 0 0 VGS = -4.5V 5 10 15 20 25 -ID, DRAIN-SOURCE CURRENT (A) Fig. 3 Typical On-Resistance vs. Drain Current and Gate Voltage RDSON, DRAIN-SOURCE ON-RESISTANCE (NORMALIZED) VGS = -5V ID = -5A VGS = -10V ID = -10A 1.1 0.9 0.7 0.5 -50 VGS = -4.5V 0.02 TA = 150°C T A = 125°C TA = 85°C TA = -55°C 0 VGS = -5V ID = -5A 0.012 0.010 VGS = -10V ID = -10A 0.008 0.006 0.004 0.002 0 -50 -25 0 25 50 75 100 125 150 TA, AMBIENT TEMPERATURE (°C) Fig.
PAGE 5
DMP2018LFK 10,000 100,000 -IDSS, LEAKAGE CURRENT (nA) f = 1MHz C, CAPACITANCE (pF) 1,000 Coss Crss 100 0 5 10 15 -VDS, DRAIN-SOURCE VOLTAGE (V) Fig. 9 Typical Total Capacitance T A = 150°C 10,000 TA = 125°C 1,000 TA = 85°C 100 10 1 20 100 10 T A = 25°C 0 4 8 12 16 -VDS, DRAIN-SOURCE VOLTAGE (V) Fig. 10 Typical Leakage Current vs. Drain-Source Voltage 20 RDS(on) Limited 8 ID, DRAIN CURRENT (A) -VGS, GATE-SOURCE VOLTAGE (V) VDS = -16V ID = -7.
PAGE 6
DMP2018LFK ADVANCE INFORMATION NEW PRODUCT Package Outline Dimensions A A3 U-DFN2523-6 Dim Min Max Typ A 0.57 0.63 0.60 A1 0 0.05 0.02 A3 0.152 − − b 0.25 0.35 0.30 D 2.45 2.55 2.50 D1 1.55 1.65 1.60 e 0.65 − − E 2.25 2.35 2.30 E1 1.18 1.28 1.23 L 0.30 0.40 0.35 L1 0.30 0.40 0.35 All Dimensions in mm A1 D e L (3x) Pin #1 ID R0.150 E E1 D1 L1 (2x) b (6x) Suggested Pad Layout X1 Y1 Y2 Y3 Dimensions Value (in mm) C 0.650 X 0.400 X1 1.700 Y 0.650 Y1 0.450 Y2 1.830 Y3 2.
PAGE 7
DMP2018LFK ADVANCE INFORMATION NEW PRODUCT IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).