Service manual

CIRCUIT DESCRIPTION
6-12
August 1993
Part No. 001-9750-001
drops below the normal range. Reset clears several
internal registers and restarts the operating program.
This prevents improper operation resulting from low-
voltage conditions.
Power-on reset occurs automatically for 4064
clock cycles whenever power is applied to the VDD
input of the microprocessor. Low-voltage reset is initi-
ated by low-voltage sensor U400. When the 5-volt
supply drops below the normal range, the output
applied to the RESET input goes low. This resets the
microprocessor and also inhibits operation for as long
as it is low. The microprocessor also has internal reset
circuits which cause reset if problems occur with the
clock signal, illegal op codes, or a watchdog timer
circuit.
Address/Data Bus
A/D0-A/D7 - To minimize the number of pins
required, the lower eight bits of the sixteen-bit address
are multiplexed with the eight data bits. During the
first half of a bus cycle, address bits A0-A7 are
present, and during the second half, the bus is used as
a bi-directional data bus. The eight address bits are
latched by address latch U402 when a pulse occurs on
the AS pin.
AS (Address Strobe) - The address information on
AD0-AD7 is latched by U402 when a high-to-low
transition occurs on this output.
E - This output is used to enable external devices
during the second half of the bus cycle. It goes high
when the external device can place data on the data
bus.
R/W
- This output indicates the direction of data on
the data bus. It is high for read operations and low for
write operations.
A/D Converter Inputs
VREFH/VREFL - These inputs provide the refer-
ence voltages for the A/D converter circuitry. R403
and C402 attenuate noise present in the 5-volt supply
applied to VREFH.
PE0 - Analog DC voltage of 0-5 volts from thermistor
RT500 on the PA board (30/35-watt models only).
This voltage decreases as power amplifier tempera-
ture increases.
PE1 - Analog DC voltage of 0-5 volts from the direc-
tional coupler on the PA board that increases with the
reflected power. This and the PE2 input are currently
not used.
PE2 - Analog DC voltage of 0-5 volts from the direc-
tional coupler on the PA board that increases with
forward power.
PE3 - Analog DC voltage of 0-5 volts that senses the
13.8 VDC battery voltage. This voltage is divided
down to the 0-5 volt range by R781 and R793, and
noise is attenuated by C822.
PE4 - Analog DC voltage of 0-5 volts from the remote
control unit volume control. The microprocessor
senses this level to digitally control speaker volume
using volume control IC U600. R785 pulls this input
low when a remote control unit is not used so that the
output level of U600 is minimum. R792 and C621
attenuate noise on the line. This input is not used with
front-mount transceivers because volume is controlled
by the front panel volume control.
PE5, PE6, PE7 - Not used.
Serial IIC Interface
The serial IIC port provides data communication
with the front panel and the remote control unit. With
the front panel, data communication is only one-way
(towards the panel). With the remote control unit, it is
bi-directional. Whenever the front panel or remote
control unit requires service from the microprocessor,
it issues a request on the SRV REQ RM N (remote) or
SRV REQ FP N (front panel) input of latch U411.
PA5 (IIC SCL) - Buffered clock output to front panel
and remote control unit.
PA6 (IIC SDA Out) - Data output to front panel and
remote control unit.
PA7 - See “Serial Peripheral Interface” description.
PA0 (IIC SDA In) - Data input from remote control
unit.