Product Specs

20 GPIO — General purpose input/output
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20 GPIO — General purpose input/output
The general purpose input/output (GPIO) is organized as one port with up to 32 I/Os (dependent on
package) enabling access and control of up to 32 pins through one port. Each GPIO can be accessed
individually.
GPIO has the following user-configurable features:
• Up to 32 GPIO
• 8 GPIO with Analog channels for SAADC, COMP or LPCOMP inputs
• Configurable output drive strength
• Internal pull-up and pull-down resistors
• Wake-up from high or low level triggers on all pins
• Trigger interrupt on state changes on any pin
• All pins can be used by the PPI task/event system
• One or more GPIO outputs can be controlled through PPI and GPIOTE channels
• All pins can be individually mapped to interface blocks for layout flexibility
• GPIO state changes captured on SENSE signal can be stored by LATCH register
The GPIO Port peripheral implements up to 32 pins, PIN0 through PIN31. Each of these pins can be
individually configured in the PIN_CNF[n] registers (n=0..31).
The following parameters can be configured through these registers:
• Direction
• Drive strength
• Enabling of pull-up and pull-down resistors
• Pin sensing
• Input buffer disconnect
• Analog input (for selected pins)
The PIN_CNF registers are retained registers. See POWER — Power supply on page 78 chapter for more
information about retained registers.
20.1 Pin configuration
Pins can be individually configured, through the SENSE field in the PIN_CNF[n] register, to detect either a
high level or a low level on their input.
When the correct level is detected on any such configured pin, the sense mechanism will set the DETECT
signal high. Each pin has a separate DETECT signal, and the default behaviour, as defined by the
DETECTMODE register, is that the DETECT signal from all pins in the GPIO Port are combined into
a common DETECT signal that is routed throughout the system, which then can be utilized by other
peripherals, see Figure 21: GPIO Port and the GPIO pin details on page 112. This mechanism is functional
in both ON and OFF mode.