Product Specs

20 GPIO — General purpose input/output
Page
130
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
f e
d
c
b
a
Z
Y
X W V U
T
S
R
Q
P
O
N
M
L
K
J
I
H
G
F
E
D
C
B
A
Reset 0x00000000
0 0
0
0
0
0
0
0
0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Id
RW Field
Value Id
Value
Description
Input
0
Read: pin set as input
Output
1
Read: pin set as output
Clear
1
Write: writing a '1' sets pin to input; writing a '0' has no effect
X
RW
PIN23
Input
0
Set as input pin 23
Read: pin set as input
Output
1
Read: pin set as output
Clear
1
Write: writing a '1' sets pin to input; writing a '0' has no effect
Y
RW
PIN24
Input
Output
Clear
0
1
1
Set as input pin 24
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
Z
RW
PIN25
Input
Output
Clear
0
1
1
Set as input pin 25
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
a
RW
PIN26
Input
Output
Clear
0
1
1
Set as input pin 26
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
b
RW
PIN27
Input
Output
Clear
0
1
1
Set as input pin 27
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
c
RW
PIN28
Input
Output
Clear
0
1
1
Set as input pin 28
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
d
RW
PIN29
Input
Output
Clear
0
1
1
Set as input pin 29
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
e
RW
PIN30
Input
Output
Clear
0
1
1
Set as input pin 30
Read: pin set as input
Read: pin set as output
Write: writing a '1' sets pin to input; writing a '0' has no effect
f
RW
PIN31
Input
0
Set as input pin 31
Read: pin set as input
Output
1
Read: pin set as output
Clear
1
Write: writing a '1' sets pin to input; writing a '0' has no effect
20.3.8 LATCH
Address offset: 0x520
Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
f e
d
c
b
a
Z
Y
X W V U
T
S
R
Q
P
O
N
M
L
K
J
I
H
G
F
E
D
C
B
A
Reset 0x00000000
0 0
0
0
0
0
0
0
0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Id
RW Field
Value Id
Value
Description
A RW PIN0
Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE
register. Write '1' to clear.
NotLatched
0
Criteria has not been met
Latched
1
Criteria has been met
B RW PIN1
Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE
register. Write '1' to clear.