Product Specs

23 RADIO — 2.4 GHz Radio
Page
208
D
0
D
4
D
7
Data out
Position 0 1 2
+
3 4 5 6
+
Data in
Figure 32: Data whitening and de-whitening
Whitening and de-whitening will be performed over the whole packet (except for the preamble and the
address field).
The linear feedback shift register, illustrated in Figure 32: Data whitening and de-whitening on page 208
can be initialised via the DATAWHITEIV register.
23.6 CRC
The CRC generator in the RADIO calculates the CRC over the whole packet excluding the preamble. If
desirable, the address field can be excluded from the CRC calculation as well
See CRCCNF register for more information.
The CRC polynomial is configurable as illustrated in Figure 33: CRC generation of an n bit CRC on page
208 where bit 0 in the CRCPOLY register corresponds to X
0
and bit 1 corresponds to X
1
etc. See
CRCPOLY for more information.
X
n
X
n-1
X
2
X
1
X
0
Packet
(Clocked in serially)
+ + + + +
b
n
b
0
Figure 33: CRC generation of an n bit CRC
As illustrated in Figure 33: CRC generation of an n bit CRC on page 208, the CRC is calculated by feeding
the packet serially through the CRC generator. Before the packet is clocked through the CRC generator, the
CRC generator's latches b
0
through b
n
will be initialized with a predefined value specified in the CRCINIT
register. When the whole packet is clocked through the CRC generator, latches b
0
through b
n
will hold the
resulting CRC. This value will be used by the RADIO during both transmission and reception but it is not
available to be read by the CPU at any time. A received CRC can however be read by the CPU via the
RXCRC register independent of whether or not it has passed the CRC check.
The length (n) of the CRC is configurable, see CRCCNF for more information.
After the whole packet including the CRC has been received, the RADIO will generate a CRCOK event if no
CRC errors were detected, or alternatively generate a CRCERROR event if CRC errors were detected.