Product Specs

Contents
Page
3
16 Debug and trace 72
16.1 DAP - Debug Access Port 72
16.2 CTRL-AP - Control Access Port 73
16.3 Debug interface mode 74
16.4 Real-time debug 74
16.5 Trace 75
17 Power and clock management 76
17.1 Current consumption scenarios 76
18 POWER — Power supply 78
18.1 Regulators 78
18.2 System OFF mode 79
18.3 System ON mode 80
18.4 Power supply supervisor 80
18.5 RAM sections 82
18.6 Reset 82
18.7 Retained registers 83
18.8 Reset behavior 83
18.9 Registers 83
18.10 Electrical specification 99
19 CLOCK — Clock control 101
19.1 HFCLK clock controller 101
19.2 LFCLK clock controller 103
19.3 Registers 105
19.4 Electrical specification 109
20 GPIO — General purpose input/output
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111
20.1 Pin configuration 111
20.2 GPIO located near the RADIO 113
20.3 Registers 113
20.4 Electrical specification 154
21 GPIOTE — GPIO tasks and events
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157
21.1 Pin events and tasks 157
21.2 Port event 158
21.3 Tasks and events pin configuration
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158
21.4 Registers 158
21.5 Electrical specification 167
22 PPI — Programmable peripheral interconnect
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168
22.1 Pre-programmed channels 169
22.2 Registers 169
23 RADIO — 2.4 GHz Radio 205
23.1 EasyDMA 205
23.2 Packet configuration 206
23.3 Maximum packet length 207
23.4 Address configuration 207
23.5 Data whitening 207
23.6 CRC 208
23.7 Radio states 209
23.8 Transmit sequence 209
23.9 Receive sequence 211
23.10 Received Signal Strength Indicator (RSSI)
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212
23.11 Interframe spacing 212
23.12 Device address match 213
23.13 Bit counter 213
23.14 Registers 214
23.15 Electrical specification 230
24 TIMER — Timer/counter 234
24.1 Capture 235
24.2 Compare 235