Product Specs

33 TWIM — I
2
C compatible two-wire interface
master with EasyDMA
Page
306
VDD VDD
R R
SDA
SCL
TWI slave
Address = b1011011
SDA
SCL
TWI slave
(Sensor)
Address = b1011000
SDA
SCL
TWI slave
(EEPROM)
Address = b1011001
SCL
SDA
TWI master
(TWIM)
Figure 78: A typical TWI setup comprising one master and three slaves
This TWI master supports clock stretching performed by the slaves. The TWI master is started by triggering
the STARTTX or STARTRX tasks, and stopped by triggering the STOP task. The TWI master will generate a
STOPPED event when it has stopped following a STOP task.
The TWI master cannot get stopped while it is suspended, so the STOP task has to be issued after the TWI
master has been resumed.
After the TWI master is started, the STARTTX task or the STARTRX task should not be triggered again
before the TWI master has stopped, i.e. following a LASTRX, LASTTX or STOPPED event.
If a NACK is clocked in from the slave, the TWI master will generate an ERROR event.
33.1 Shared resources
The TWI master shares registers and other resources with other peripherals that have the same ID as the
TWI master. Therefore, you must disable all peripherals that have the same ID as the TWI master before the
TWI master can be configured and used.
Disabling a peripheral that has the same ID as the TWI master will not reset any of the registers that are
shared with the TWI master. It is therefore important to configure all relevant registers explicitly to secure that
the TWI master operates correctly.
The Instantiation table in Instantiation on page 24 shows which peripherals have the same ID as the TWI.
33.2 EasyDMA
The TWI master implements EasyDMA for reading and writing to and from the RAM.
If the TXD.PTR and the RXD.PTR are not pointing to the Data RAM region, an EasyDMA transfer may result
in a HardFault or RAM corruption. See Memory on page 23 for more information about the different memory
regions.
The .PTR and .MAXCNT registers are double-buffered. They can be updated and prepared for the next RX/
TX transmission immediately after having received the RXSTARTED/TXSTARTED event.
The STOPPED event indicates that EasyDMA has finished accessing the buffer in RAM.
33.2.1 EasyDMA list
EasyDMA supports one list type.
The supported list type is:
• Array list
EasyDMA array list
The EasyDMA array list can be represented by the data structure ArrayList_type.
For illustration, see the code example below. This data structure includes only a buffer with size equal
to Channel.MAXCNT. EasyDMA will use the Channel.MAXCNT register to determine when the buffer
is full. Replace 'Channel' by the specific data channel you want to use, for instance 'NRF_SPIM->RXD',
'NRF_SPIM->TXD', 'NRF_TWIM->RXD', etc.