Product Specs

11 NVMC — Non-volatile memory controller
Page
32
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW ERASEALL
Erase all non-volatile memory including UICR registers. Note
that code erase has to be enabled by CONFIG.EEN before the
UICR can be erased.
NoOperation
0
No operation
Erase
1
Start chip erase
11.7.6 ERASEPCR0 ( Deprecated )
Address offset: 0x510
Register for erasing a page in Code area. Equivalent to ERASEPAGE.
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0x00000000
0 0
0
0
0
0
0
0
0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Id
RW Field
Value Id
Value
Description
A RW ERASEPCR0 Register for starting erase of a page in Code area. Equivalent to
ERASEPAGE.
11.7.7 ERASEUICR
Address offset: 0x514
Register for erasing User Information Configuration Registers
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW ERASEUICR
Register starting erase of all User Information Configuration
Registers. Note that code erase has to be enabled by
CONFIG.EEN before the UICR can be erased.
NoOperation
0
No operation
Erase
1
Start erase of UICR
11.7.8 ICACHECNF
Address offset: 0x540
I-Code cache configuration register.
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
B
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW CACHEEN
Disabled
0
Cache enable
Disable cache. Invalidates all cache entries.
Enabled
1
Enable cache
B RW CACHEPROFEN
Disabled
0
Cache profiling enable
Disable cache profiling
Enabled
1
Enable cache profiling
11.7.9 IHIT
Address offset: 0x548
I-Code cache hit counter.