Product Specs

Table Of Contents
12 BPROT Block protection
Page
34
Register Offset Description
0x60C Reserved
12
BPROT Block protection
The mechanism for protecting non-volatile memory can be used to prevent application code from erasing or
writing to protected blocks.
Non-volatile memory can be protected from erases and writes depending on the settings in the CONFIG
registers. One bit in a CONFIG register represents one protected block of 4 kB. There are four CONFIG
registers of 32 bits, which means there are 128 protectable blocks in total.
Important: If an erase or write to a protected block is detected, the CPU will hard fault. If an
ERASEALL operation is attempted from the CPU while any block is protected, it will be blocked and
the CPU will hard fault.
On reset, all the protection bits are cleared. To ensure safe operation, the first task after reset must be to set
the protection bits. The only way of clearing protection bits is by resetting the device from any reset source.
The protection mechanism is turned off when in debug interface mode (a debugger is connected) and the
DISABLEINDEBUG register is set to disable. For more information, see Debug and trace on page 72.
Program Memory
l
31 CONFIG[3] 0
0x00000000
l
31 CONFIG[0] 0
Figure 9: Protected regions of program memory
12.1 Registers
Table 14: Instances
Base address
Peripheral
Instance
Description
Configuration
0x40000000
BPROT
BPROT
Block Protect
Table 15: Register Overview
CONFIG0 0x600 Block protect configuration register 0
CONFIG1 0x604 Block protect configuration register 1
DISABLEINDEBUG 0x608 Disable protection mechanism in debug interface mode
CONFIG2 0x610 Block protect configuration register 2
CONFIG3 0x614 Block protect configuration register 3
127
126
125
...
2
1
0