Product Specs

37 SAADC — Successive approximation analog-
to-digital converter
Page
363
Input range = (+- 0.6 V or +-VDD/4)/Gain
Input range = (VDD/4)/(1/4) = VDD
Input range = (0.6 V)/(1/6) = 3.6 V
RESP = Pullup
R
Input
Output
R
RESP = Pulldown
Figure 102: Resistor ladder for positive input (negative input is equivalent, using RESN instead of
RESP)
37.8 Reference
The ADC can use two different references, controlled in the REFSEL field of the CH[n].CONFIG register.
These are:
• Internal reference
• VDD as reference
The internal reference results in an input range of ±0.6 V on the ADC core. VDD as reference results in an
input range of ±VDD/4 on the ADC core. The gain block can be used to change the effective input range of
the ADC.
For example, choosing VDD as reference, single ended input (grounded negative input), and a gain of 1/4
the input range will be:
With internal reference, single ended input (grounded negative input), and a gain of 1/6 the input range will
be:
The AIN0-AIN7 inputs cannot exceed VDD, or be lower than VSS.
37.9 Acquisition time
To sample the input voltage, the ADC connects a capacitor to the input.
For illustration, see Figure 103: Simplified ADC sample network on page 364. The acquisition time
indicates how long the capacitor is connected, see TACQ field in CH[n].CONFIG register. The required
acquisition time depends on the source (R
source
) resistance. For high source resistance the acquisition time
should be increased, see Table 88: Acquisition time on page 364.