Product Specs

38 COMP — Comparator
Page
393
f_OSC = I_SOURCE / (2C∙(VUP-VDOWN) )
to use and the output of the COMP is correct. When the COMP module is started, events will be generated
every time VIN+ crosses VIN-.
VIN- can be derived directly from AIN0 or AIN1 in differential mode, or VREF in single-ended mode. VUP
and VDOWN thresholds can be set to implement a hysteresis on VIN- using the Reference Ladder. VREF
can be derived from VDD, AIN0, AIN1 or internal 1.2V, 1.8V and 2.4V references.
An upward crossing will generate an UP event and a downward crossing will generate a DOWN event. The
CROSS event will be generated every time there is a crossing, independent of direction.
An optional hysteresis on VIN+ and VIN- can be enabled when the module is used in differential mode
through the HYST register. In single ended mode the two reference ladders (VUP and VDOWN, see Figure
112: Comparator in single-ended mode on page 395) will be used instead of the hysteresis mechanism
configured in HYST.
This hysteresis is in the order of magnitude of 50 mV, and shall prevent noise on the signal to create
unwanted events. See Figure 113: Hysteresis example where VIN+ starts below VUP on page 395 for
illustration of the effect of an active hysteresis on a noisy input signal.
The COMP can be configured to operate in two main operation modes, differential mode and single-ended
mode, see MODE register for more information.
The COMP can, for both main operation modes, operate in different speed and power consumption modes,
see MODE register. High-speed mode will consume more power compared to low-power mode, and low-
power mode will result in slower response time compared to high-speed mode.
The immediate value of the COMP can be sampled to the RESULT register by triggering the SAMPLE task.
A selectable current can be applied (ISOURCE register) on the currently selected AINx line. Enabling the
block creates a feedback path around the comparator, forming a relaxation oscillator. The circuit will sink
current from VIN+ when the comparator output is high, and source current into VIN+ when the comparator
output is low. The frequency of the oscillator is dependent on the capacitance at the analog input pin, the
reference voltages and the value of the current source. In this mode, only a capacitive sensor needs to be
attached between the analog input pin and ground. With a selected current of 10 µA, VUP-VDOWN equal to
1 V, and an external capacity of typically 10 pF, the resulting oscillation frequency is around 500 kHz.
The frequency of the oscillator can be calculated as
38.1 Shared resources
The COMP shares analog resources with the SAADC and LPCOMP peripherals.
While it is possible to use SAADC at the same time as COMP or LPCOMP, COMP and LPCOMP are
mutually exclusive: enabling one will automatically disable the other. In addition, when using SAADC and
COMP or LPCOMP simultaneously, it is not possible to select the same analog input pin for both modules.
Important: The COMP peripheral shall not be disabled (by writing to the ENABLE register) before
the peripheral has stopped. Failing to do so may result in unpredictable behaviour.
38.2 Differential mode
In differential mode, the reference input VIN- is derived directly from one of the AINx pins.
In this mode, the impedance on VIN-'s signal path is equal to the impedance on VIN+'s signal path. See
Z
COMPVINP
and Z
COMPVINND
for more information. In differential mode, the PSEL, MODE and EXTREFSEL
registers must be configured before the COMP is enabled via the ENABLE register. When HYST is turned
on while in this mode, the Output of the comparator (and associated events) will change from ABOVE
to BELOW whenever VIN+ becomes smaller than (VIN- - (V
DIFFHYST
/ 2) ). Similarly, it will change from
BELOW to ABOVE whenever VIN+ becomes larger than (VIN- + (V
DIFFHYST
/ 2) ), as illustrated in Figure
111: Hysteresis enabled in differential mode on page 394.