Product Specs

Table Of Contents
39 LPCOMP Low power comparator
Page
403
39 LPCOMP Low power comparator
LPCOMP compares an input voltage against a reference voltage.
Listed here are the main features of LPCOMP:
0 - VDD input range
Ultra low power
Eight input options (AIN0 to AIN7)
Reference voltage options:
Two external analog reference inputs, or
15-level internal reference ladder (VDD/16)
Optional hysteresis enable on input
Wakeup source from OFF mode
In System ON, the LPCOMP can generate separate events on rising and falling edges of a signal, or sample
the current state of the pin as being above or below the selected reference. The block can be configured
to use any of the analog inputs on the device. Additionally, the low power comparator can be used as an
analog wakeup source from System OFF or System ON. The comparator threshold can be programmed to a
range of fractions of the supply voltage.
Restriction: LPCOMP cannot be used (STARTed) at the same time as COMP. Only one comparator
can be used at a time.
AIN0
AIN1
Figure 115: Low power comparator
The wakeup comparator (LPCOMP) compares an input voltage (VIN+), which comes from an analog input
pin selected via the PSEL register against a reference voltage (VIN-) selected via the REFSEL on page
408 and EXTREFSEL registers.
The PSEL, REFSEL, and EXTREFSEL registers must be configured before the LPCOMP is enabled through
the ENABLE register.
The HYST register allows enabling an optional hysteresis in the comparator core. This hysteresis is in
the order of magnitude of 50 mV, and shall prevent noise on the signal to create unwanted events. See
Figure 116: Effect of hysteresis on a noisy input signal on page 404 for illustration of the effect of an active
hysteresis on a noisy input signal. It is disabled by default, and shall be configured before enabling LPCOMP
as well.
The LPCOMP is started by triggering the START task. After a start-up time of t
LPCOMP,STARTUP
the LPCOMP
will generate a READY event to indicate that the comparator is ready to use and the output of the LPCOMP
is correct. The LPCOMP will generate events every time VIN+ crosses VIN-. More specifically, every time
VIN+ rises above VIN- (upward crossing) an UP event is generated along with a CROSS event. Every time
VIN+ falls below VIN- (downward crossing), a DOWN event is generated along with a CROSS event. When
tasks
EXTREFSEL
REFSEL
PSEL
HYST
RESULT
MUX
AREF
VDD*1/16
VDD*1/8
VDD*3/16
VDD*2/8
VDD*5/16
VDD*3/8
VDD*7/16
VDD*4/8
VDD*9/16
VDD*5/8
VDD*11/16
VDD*6/8
VDD*13/16
VDD*7/8
VDD*15/16
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
VIN+
MUX +
Comparator
core
ANADETECT
(signal to POWER module)
MUX
VIN-
-
events
READY
DOWN
CROSS
SAMPLE
STOP
START
UP