Product Specs

Table Of Contents
42 NFCT Near field communication tag
Page
423
The Frame Assemble operation is illustrated in Figure 120: Frame assemble on page 423 for different
settings in TXD.FRAMECONFIG. All shaded bits fields are added by the frame assembler. Some of these
bits are optional and appearances are configured in TXD.FRAMECONFIG. Please note that the frames
illustrated do not necessarily comply with the NFC specification. The figure is only to illustrate the behavior of
the NFC peripheral.
Data from RAM
Byte 1: PACKETPTR + 0 Byte 2: PACKETPTR + 1
Byte (TXDATABYTES) Byte (TXDATABYTES + 1)
Frame on air
PARITY = Parity, TXDATABITS = 0, CRCM ODETX = CRC16TX
Byte 1 Byte 2
Byte (TXDATABYTES)
(only if TXDATABITS > 0)
C b
PARITY = Parity, TXDATABITS = 4, CRCMODETX = NoCRCTX, DISCARDMODE = DiscardStart
Byte 1 Byte 2 Byte (TXDATABYTES) Byte (TXDATABYTES + 1)
SoF
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
EoF
PARITY = Parity, TXDATABITS = 0, CRCMODETX = NoCRCTX
Byte 1 Byte TXDATABYTES
SoF
b0
b1
b2
b3
b4
b5
b6
b7
P
EoF
Figure 120: Frame assemble
The accurate timing for transmitting the frame on air is set using the frame timing controller settings.
42.7 Frame disassembler
The NFC peripheral implements a frame disassembler in hardware.
When the NFC peripheral is in the ACTIVE_A state, the software can decide to enter RX or TX mode. For
TX, see Frame assembler on page 422. For RX, the software must indicate the address of the destination
buffer in Data RAM and its size through programming the PACKETPTR and MAXCNT registers respectively,
then issuing a ENABLERXDATA task.
The STARTED event indicates that the PACKETPTR and MAXCNT registers have been captured by the
frame disassembler's EasyDMA.
When an incoming frame starts, the RXFRAMESTART event will get issued and data will be written to the
buffer in Data RAM. The frame disassembler will verify and remove on the fly any parity bits and SoF and
End of Frame (EoF) symbols based on RXD.FRAMECONFIG register configuration. It will, however, verify
and transfer the CRC bytes into RAM, if the CRC is was enabled through RXD.FRAMECONFIG.
When an EoF symbol is detected, the NFC peripheral will assert the RXFRAMEEND event and write the
RXD.AMOUNT register to indicate numbers of received bytes and bits in the data packet. The module does
not interpret the content of the data received from the remote NFC device, except for SoF, EoF, parity and
CRC checking, as described above. The Frame disassemble operation is illustrated in Figure 121: Frame
disassemble illustration on page 423.
Per NFC specification, the time between end of frame to the next start of frame can be as short as 86 µs,
so care must be taken that PACKETPTR and MAXCNT are ready and ENABLERXDATA is issued on time
after the end of previous frame. The use of a PPI shortcut from TXFRAMEEND to ENABLERXDATA is
recommended.
Frame on air
PARITY = Parity, RXDATABITS = 0, CRCMODERX = CRC16RX, RXDATABITS = 0
Byte 1
Byte 2 Byte RXDATABYTES
C b
PARITY = Parity, CRCMODERX = NoCRCRX, RXDATABITS = 4
Byte 1 Byte 2 Byte RXDATABYTES Byte (RXDATABYTES+1)
SoF
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
EoF
PARITY = NoParity, CRCMODERX = NoCRCRX, RXDATABITS = 0
Byte 1 Byte 2
Byte RXDATABYTES
SoF
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
EoF
Data to RAM
Byte 1: (PACKETPTR + 0) Byte 2: (PACKETPTR + 1) Byte RXDATABYTES Byte (RXDATABYTES+1)
Figure 121: Frame disassemble illustration
(only if RXDATABITS > 0)
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
P
b7
b6
b5
b4
b3
b2
b1
b0
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
SoF
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
CRC
1 (8 b
it)
P
CR
2 (8
it)
P
EoF
SoF
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
b0
b1
b2
b3
b4
b5
b6
b7
P
CRC
1 (8 b
it)
P
CR
2 (8
it)
P
EoF
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7
b0
b1
b2
b3
b4
b5
b6
b7