Product Specs

43 PDM — Pulse density modulation interface
Page
438
GAINL = GAINR = (DefaultGain - (2 * 3))
(RAM allocation, in bytes) = SAMPLE.MAXCNT * 2;
The continuous transfer can be started or stopped by sending the START and STOP tasks. STOP becomes
effective after the current frame has finished transferring, which will generate the STOPPED event. The
STOPPED event indicates that all activity in the module are finished, and that the data is available in RAM
(EasyDMA has finished transferring as well). Attempting to restart before receiving the STOPPED event may
result in unpredictable behaviour.
43.3 Decimation filter
In order to convert the incoming data stream into PCM audio samples, a decimation filter is included in the
PDM interface module.
The input of the filter is the two-channel PDM serial stream (with left channel on clock high, right channel on
clock low), its output is 2 × 16-bit PCM samples at a sample rate 64 times lower than the PDM clock rate.
The filter stage of each channel is followed by a digital volume control, to attenuate or amplify the output
samples in a range of -20 dB to +20 dB around the default (reset) setting, defined by G
PDM,default
. The gain is
controlled by the GAINL and GAINR registers.
As an example, if the goal is to achieve 2500 RMS output samples (16 bit) with a 1 kHz 90 dBA signal into a
-26 dBFS sensitivity PDM microphone, the user will have to sum the PDM module's default gain ( G
PDM,default
) and the gain introduced by the microphone and acoustic path of his implementation (an attenuation would
translate into a negative gain), and adjust GAINL and GAINR by this amount. Assuming that only the PDM
module influences the gain, GAINL and GAINR must be set to -G
PDM,default
dB to achieve the requirement.
With G
PDM,default
=3.2 dB, and as GAINL and GAINR are expressed in 0.5 dB steps, the closest value to
program would be 3.0 dB, which can be calculated as:
Remember to check that the resulting values programmed into GAINL and GAINR fall within MinGain and
MaxGain.
43.4 EasyDMA
Samples will be written directly to RAM, and EasyDMA must be configured accordingly.
The address pointer for the EasyDMA channel is set in SAMPLE.PTR register. If the destination address set
in SAMPLE.PTR is not pointing to the Data RAM region, an EasyDMA transfer may result in a HardFault or
RAM corruption. See Memory on page 23 for more information about the different memory regions.
DMA supports Stereo (Left+Right 16-bit samples) and Mono (Left only) data transfer, depending on setting in
the OPERATION field in the MODE register. The samples are stored little endian.
Table 101: DMA sample storage
MODE.OPERATION
Bits per sample
Result stored per RAM
word
Physical RAM allocated
(32 bit words)
Result boundary indexes Note
in RAM
Stereo
32 (2x16)
L+R
ceil(SAMPLE.MAXCNT/2)
R0=[31:16]; L0=[15:0] Default
Mono
16
2xL
ceil(SAMPLE.MAXCNT/2)
L1=[31:16]; L0=[15:0]
The destination buffer in RAM consists of one block, the size of which is set in SAMPLE.MAXCNT register.
Format is number of 16-bit samples. The physical RAM allocated is always:
(but the mapping of the samples depends on MODE.OPERATION.
If OPERATION=Stereo, RAM will contain a succession of Left and Right samples.
If OPERATION=Mono, RAM will contain a succession of mono samples.