Product Specs

44 I
2
S — Inter-IC sound interface
Page
450
44.7 EasyDMA
The I
2
S module implements EasyDMA for accessing internal Data RAM without CPU intervention.
The source and destination pointers for the TX and RX data are configured in TXD.PTR on page 459 and
RXD.PTR on page 459. The memory pointed to by these pointers will only be read or written when TX or
RX are enabled in CONFIG.TXEN on page 456 and CONFIG.RXEN on page 456.
The addresses written to the pointer registers TXD.PTR on page 459 and RXD.PTR on page 459 are
double-buffered in hardware, and these double buffers are updated for every RXTXD.MAXCNT on page
459 words (containing one or more samples) read/written from/to memory. The events TXPTRUPD and
RXPTRUPD are generated whenever the TXD.PTR and RXD.PTR are transferred to these double buffers.
If TXD.PTR on page 459 is not pointing to the Data RAM region when transmission is enabled, or
RXD.PTR on page 459 is not pointing to the Data RAM region when reception is enabled, an EasyDMA
transfer may result in a HardFault and/or memory corruption. See Memory on page 23 for more information
about the different memory regions.
Due to the nature of I
2
S, where the number of transmitted samples always equals the number of received
samples (at least when both TX and RX are enabled), one common register RXTXD.MAXCNT on page
459 is used for specifying the sizes of these two memory buffers. The size of the buffers is specified in
a number of 32-bit words. Such a 32-bit memory word can either contain four 8-bit samples, two 16-bit
samples or one right-aligned 24-bit sample sign extended to 32 bit.
In stereo mode (CONFIG.CHANNELS=Stereo), the samples are stored as "left and right sample
pairs" in memory. Figure Figure 134: Memory mapping for 8 bit stereo. CONFIG.SWIDTH = 8Bit,
CONFIG.CHANNELS = Stereo. on page 450, Figure 136: Memory mapping for 16 bit stereo.
CONFIG.SWIDTH = 16Bit, CONFIG.CHANNELS = Stereo. on page 451 and Figure 138: Memory
mapping for 24 bit stereo. CONFIG.SWIDTH = 24Bit, CONFIG.CHANNELS = Stereo. on page 451 show
how the samples are mapped to memory in this mode. The mapping is valid for both RX and TX.
In mono mode (CONFIG.CHANNELS=Left or Right), RX sample from only one channel in the frame is
stored in memory, the other channel sample is ignored. Illustrations Figure 135: Memory mapping for 8
bit mono. CONFIG.SWIDTH = 8Bit, CONFIG.CHANNELS = Left. on page 451, Figure 137: Memory
mapping for 16 bit mono, left channel only. CONFIG.SWIDTH = 16Bit, CONFIG.CHANNELS = Left. on
page 451 and Figure 139: Memory mapping for 24 bit mono, left channel only. CONFIG.SWIDTH = 24Bit,
CONFIG.CHANNELS = Left. on page 452 show how RX samples are mapped to memory in this mode.
For TX, the same outgoing sample read from memory is transmitted on both left and right in a frame,
resulting in a mono output stream.
31
24 23 16 15 8 7 0
x.PTR
x.PTR + 4
x.PTR + (n*2) - 4
Figure 134: Memory mapping for 8 bit stereo. CONFIG.SWIDTH = 8Bit, CONFIG.CHANNELS = Stereo.
Right sample 1
Left sample 1
Right sample 0
Left sample 0
Right sample 3
Left sample 3
Right sample 2
Left sample 2
Left sample
n-1
Right sample
n-1
Right sample
n-2
Left sample
n-2