Product Specs

Table Of Contents
44 I
2
S Inter-IC sound interface
Page
453
NRF_I2S->TXD.PTR = my_tx_buf;
NRF_I2S->RXD.PTR = my_rx_buf;
NRF_I2S->TXD.MAXCNT = MY_BUF_SIZE;
NRF_I2S->ENABLE = 1;
NRF_I2S->TASKS_START = 1;
if(NRF_I2S->EVENTS_TXPTRUPD != 0)
{
NRF_I2S->TXD.PTR = my_next_tx_buf;
NRF_I2S->EVENTS_TXPTRUPD = 0;
}
if(NRF_I2S->EVENTS_RXPTRUPD != 0)
{
NRF_I2S->RXD.PTR = my_next_rx_buf;
NRF_I2S->EVENTS_RXPTRUPD = 0;
}
I2S_PSEL_LRCK_CONNECT_Pos);
// SDOUT routed to pin 3
NRF_I2S->PSEL.SDOUT = (3 << I2S_PSEL_SDOUT_PIN_Pos) |
(I2S_PSEL_SDOUT_CONNECT_Connected <<
I2S_PSEL_SDOUT_CONNECT_Pos);
// SDIN routed on pin 4
NRF_I2S->PSEL.SDIN = (4 << I2S_PSEL_SDIN_PIN_Pos) |
(I2S_PSEL_SDIN_CONNECT_Connected <<
I2S_PSEL_SDIN_CONNECT_Pos);
3. Configure TX and RX data pointers using the TXD, RXD and RXTXD registers
4. Enable the I
2
S module using the ENABLE register
5. Start audio streaming using the START task
6. Handle received and transmitted data when receiving the TXPTRUPD and RXPTRUPD events
44.9 Pin configuration
The MCK, SCK, LRCK, SDIN and SDOUT signals associated with the I
2
S module are mapped to physical
pins according to the pin numbers specified in the PSEL.x registers.
These pins are acquired whenever the I
2
S module is enabled through the register ENABLE on page 456.
When a pin is acquired by the I
2
S module, the direction of the pin (input or output) will be configured
automatically, and any pin direction setting done in the GPIO module will be overridden. The directions for
the various I
2
S pins are shown below in Table 106: GPIO configuration before enabling peripheral (master
mode) on page 453 and Table 107: GPIO configuration before enabling peripheral (slave mode) on page
454.
To secure correct signal levels on the pins when the system is in OFF mode, and when the I
2
S module is
disabled, these pins must be configured in the GPIO peripheral directly.
Table 106: GPIO configuration before enabling peripheral (master mode)
I
2
S signal
I
2
S pin
Direction
Output value
Comment
MCK
As specified in PSEL.MCK
Output
0
LRCK
As specified in PSEL.LRCK
Output
0