Product Specs

47 PWM — Pulse width modulation
Page
497
uint16_t pwm_seq[4] = {PWM_CH0_DUTY, PWM_CH1_DUTY, PWM_CH2_DUTY,
PWM_CH3_DUTY};
NRF_PWM0->PSEL.OUT[0] = (first_pin << PWM_PSEL_OUT_PIN_Pos) |
(PWM_PSEL_OUT_CONNECT_Connected <<
PWM_PSEL_OUT_CONNECT_Pos);
NRF_PWM0->PSEL.OUT[1] = (second_pin << PWM_PSEL_OUT_PIN_Pos) |
(PWM_PSEL_OUT_CONNECT_Connected <<
PWM_PSEL_OUT_CONNECT_Pos);
NRF_PWM0->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
NRF_PWM0->MODE
NRF_PWM0->PRESCALER
NRF_PWM0->COUNTERTOP
NRF_PWM0->LOOP
NRF_PWM0->DECODER
= (PWM_MODE_UPDOWN_Up << PWM_MODE_UPDOWN_Pos);
= (PWM_PRESCALER_PRESCALER_DIV_1 <<
PWM_PRESCALER_PRESCALER_Pos);
= (16000 << PWM_COUNTERTOP_COUNTERTOP_Pos); //1 msec
= (PWM_LOOP_CNT_Disabled << PWM_LOOP_CNT_Pos);
= (PWM_DECODER_LOAD_Individual << PWM_DECODER_LOAD_Pos) |
(PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);
NRF_PWM0->SEQ[0].PTR = ((uint32_t)(pwm_seq) << PWM_SEQ_PTR_PTR_Pos);
NRF_PWM0->SEQ[0].CNT = ((sizeof(pwm_seq) / sizeof(uint16_t)) <<
PWM_SEQ_CNT_CNT_Pos);
NRF_PWM0->SEQ[0].REFRESH = 0;
NRF_PWM0->SEQ[0].ENDDELAY = 0;
NRF_PWM0->TASKS_SEQSTART[0] = 1;
and when loading a new value from RAM during a sequence playback. If DECODER.LOAD=WaveForm, the
register value is ignored, and taken from RAM instead (see Decoder with EasyDMA on page 499 below).
Figure 142: PWM up counter example - FallingEdge polarity on page 497 shows the counter operating in
up (MODE=PWM_MODE_Up) mode with three PWM channels with the same frequency but different duty
cycle. The counter is automatically reset to zero when COUNTERTOP is reached and OUT[n] will invert.
OUT[n] is held low if the compare value is 0 and held high respectively if set to COUNTERTOP given that the
polarity is set to FallingEdge. Running in up counter mode will result in pulse widths that are edge-aligned.
See the code example below:
COUNTERTOP
COMP1
COMP0
OUT[0]
OUT[1]
Figure 142: PWM up counter example - FallingEdge polarity
In up counting mode, the following formula can be used to compute PWM period and step size:
PWM period: T
PWM(Up)
= T
PWM_CLK
* COUNTERTOP
Step width/Resolution: T
steps
= T
PWM_CLK