Product Specs

Table Of Contents
47 PWM Pulse width modulation
Page
501
NRF_PWM0->PSEL.OUT[0] = (first_pin << PWM_PSEL_OUT_PIN_Pos) |
(PWM_PSEL_OUT_CONNECT_Connected <<
PWM_PSEL_OUT_CONNECT_Pos);
NRF_PWM0->ENABLE
NRF_PWM0->MODE
NRF_PWM0->PRESCALER
NRF_PWM0->COUNTERTOP
NRF_PWM0->LOOP
NRF_PWM0->DECODER
= (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
= (PWM_MODE_UPDOWN_Up << PWM_MODE_UPDOWN_Pos);
= (PWM_PRESCALER_PRESCALER_DIV_1 <<
PWM_PRESCALER_PRESCALER_Pos);
= (16000 << PWM_COUNTERTOP_COUNTERTOP_Pos); //1 msec
= (PWM_LOOP_CNT_Disabled << PWM_LOOP_CNT_Pos);
= (PWM_DECODER_LOAD_Common << PWM_DECODER_LOAD_Pos) |
(PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);
NRF_PWM0->SEQ[0].PTR = ((uint32_t)(seq0_ram) << PWM_SEQ_PTR_PTR_Pos);
NRF_PWM0->SEQ[0].CNT = ((sizeof(seq0_ram) / sizeof(uint16_t)) <<
PWM_SEQ_CNT_CNT_Pos);
NRF_PWM0->SEQ[0].REFRESH = 0;
NRF_PWM0->SEQ[0].ENDDELAY = 0;
NRF_PWM0->TASKS_SEQSTART[0] = 1;
Figure 145: Simple sequence example on page 501 depicts the source code used for configuration and
timing details in a sequence where only sequence 0 is used and only run once with a new PWM duty cycle
for each period.
SEQ[0].CNT=4, SEQ[0].REFRESH=0, SEQ[0].ENDDELAY=0, LOOP.CNT=0
Continues With Last Setting
P
SEQ[0].PTR
O
L
P
O
L
P
O
L
P
O
L
Event/Tasks
PWM Pulse Period
COMPARE
3
COMPARE
2
COMPARE
1
COMPARE
0
SEQSTART[0]
SEQSTARTED[0]
SEQEND[0]
Figure 145: Simple sequence example
A more complex example is shown in Figure 146: Example using two sequences on page 502, where
LOOP.CNT>0 . In this case, an automated playback takes place, consisting of SEQ[0], delay 0, SEQ[1],
delay 1, then again SEQ[0], etc. The user can choose to start a complex playback with SEQ[0] or SEQ[1]
through sending the SEQSTART[0] or SEQSTART[1] task.
The complex playback always ends with delay 1.
The two sequences 0 and 1 are defined with address of values tables in Data RAM (pointed by SEQ[n].PTR)
and respective buffer size (SEQ[n].CNT). The rate at which a new value is loaded is defined individually
for each sequence by SEQ[n].REFRESH . The chaining of sequence 1 following sequence 0 is implicit, the
LOOP.CNT register allows the chaining of sequence 1 to sequence 0 for a determined number of times. In
other words, it allows to repeat a complex sequence a number of times in a fully automated way.
In the example below, sequence 0 is defined with SEQ[0].REFRESH set to one - that means that a
new PWM duty cycle is pushed every second PWM period. This complex sequence is started with the
SEQSTART[0] task, so SEQ[0] is played first. Since SEQ[0].ENDDELAY=1 there will be one PWM period
delay between last period on sequence 0 and the first period on sequence 1. Since SEQ[1].ENDDELAY=0
there is no delay 1, so SEQ[0] would be started immediately after the end of SEQ[1]. However, as
LOOP.CNT is one, the playback stops after having played only once SEQ[1], and both SEQEND[1] and
LOOPSDONE are generated (their order is not guaranteed in this case).